dt-bindings: ARM: brcmstb: Update Broadcom STB Power Management binding
authorFlorian Fainelli <f.fainelli@gmail.com>
Thu, 15 Jun 2017 20:39:51 +0000 (13:39 -0700)
committerFlorian Fainelli <f.fainelli@gmail.com>
Mon, 18 Sep 2017 18:59:41 +0000 (11:59 -0700)
Update the Broadcom STB Power Management binding document with new
compatible strings for the DDR PHY and memory controller found on newer
chips.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Documentation/devicetree/bindings/arm/bcm/brcm,brcmstb.txt

index 0d0c1ae81bedfd4ae07fb746b0b51faedb589a0f..790e6b0b83065688df09bae883cdc401dc483f64 100644 (file)
@@ -164,6 +164,8 @@ Control registers for this memory controller's DDR PHY.
 
 Required properties:
 - compatible     : should contain one of these
+       "brcm,brcmstb-ddr-phy-v71.1"
+       "brcm,brcmstb-ddr-phy-v72.0"
        "brcm,brcmstb-ddr-phy-v225.1"
        "brcm,brcmstb-ddr-phy-v240.1"
        "brcm,brcmstb-ddr-phy-v240.2"
@@ -184,7 +186,9 @@ Sequencer DRAM parameters and control registers. Used for Self-Refresh
 Power-Down (SRPD), among other things.
 
 Required properties:
-- compatible     : should contain "brcm,brcmstb-memc-ddr"
+- compatible     : should contain one of these
+       "brcm,brcmstb-memc-ddr-rev-b.2.2"
+       "brcm,brcmstb-memc-ddr"
 - reg            : the MEMC DDR register range
 
 Example: