drm/nouveau/ltc: s/ltcg/ltc/ + cleanup
authorBen Skeggs <bskeggs@redhat.com>
Sat, 9 Aug 2014 18:10:28 +0000 (04:10 +1000)
committerBen Skeggs <bskeggs@redhat.com>
Sat, 9 Aug 2014 19:28:13 +0000 (05:28 +1000)
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
19 files changed:
drivers/gpu/drm/nouveau/Makefile
drivers/gpu/drm/nouveau/core/engine/device/base.c
drivers/gpu/drm/nouveau/core/engine/device/gm100.c
drivers/gpu/drm/nouveau/core/engine/device/nvc0.c
drivers/gpu/drm/nouveau/core/engine/device/nve0.c
drivers/gpu/drm/nouveau/core/include/core/device.h
drivers/gpu/drm/nouveau/core/include/subdev/ltc.h [new file with mode: 0644]
drivers/gpu/drm/nouveau/core/include/subdev/ltcg.h [deleted file]
drivers/gpu/drm/nouveau/core/subdev/fb/ramnvc0.c
drivers/gpu/drm/nouveau/core/subdev/ltc/base.c [new file with mode: 0644]
drivers/gpu/drm/nouveau/core/subdev/ltc/gf100.c [new file with mode: 0644]
drivers/gpu/drm/nouveau/core/subdev/ltc/gk104.c [new file with mode: 0644]
drivers/gpu/drm/nouveau/core/subdev/ltc/gm107.c [new file with mode: 0644]
drivers/gpu/drm/nouveau/core/subdev/ltc/priv.h [new file with mode: 0644]
drivers/gpu/drm/nouveau/core/subdev/ltcg/gf100.c [deleted file]
drivers/gpu/drm/nouveau/core/subdev/ltcg/gf100.h [deleted file]
drivers/gpu/drm/nouveau/core/subdev/ltcg/gm107.c [deleted file]
drivers/gpu/drm/nouveau/core/subdev/mc/nvc0.c
drivers/gpu/drm/nouveau/core/subdev/vm/nvc0.c

index 029e0555fa38500ba2983a1a31c7822ec32ff680..1a44d952cc3a60ef4cd7de4b1a0a9cc5dd97c294 100644 (file)
@@ -153,8 +153,10 @@ nouveau-y += core/subdev/instmem/base.o
 nouveau-y += core/subdev/instmem/nv04.o
 nouveau-y += core/subdev/instmem/nv40.o
 nouveau-y += core/subdev/instmem/nv50.o
-nouveau-y += core/subdev/ltcg/gf100.o
-nouveau-y += core/subdev/ltcg/gm107.o
+nouveau-y += core/subdev/ltc/base.o
+nouveau-y += core/subdev/ltc/gf100.o
+nouveau-y += core/subdev/ltc/gk104.o
+nouveau-y += core/subdev/ltc/gm107.o
 nouveau-y += core/subdev/mc/base.o
 nouveau-y += core/subdev/mc/nv04.o
 nouveau-y += core/subdev/mc/nv40.o
index e4e089b65a016e45f234228e4a9cfca1f9428d65..8928f7981d4ada8eb4a7758878504e61b5a668ca 100644 (file)
@@ -214,7 +214,7 @@ static const u64 disable_map[] = {
        [NVDEV_SUBDEV_BUS]      = NV_DEVICE_V0_DISABLE_CORE,
        [NVDEV_SUBDEV_TIMER]    = NV_DEVICE_V0_DISABLE_CORE,
        [NVDEV_SUBDEV_FB]       = NV_DEVICE_V0_DISABLE_CORE,
-       [NVDEV_SUBDEV_LTCG]     = NV_DEVICE_V0_DISABLE_CORE,
+       [NVDEV_SUBDEV_LTC     = NV_DEVICE_V0_DISABLE_CORE,
        [NVDEV_SUBDEV_IBUS]     = NV_DEVICE_V0_DISABLE_CORE,
        [NVDEV_SUBDEV_INSTMEM]  = NV_DEVICE_V0_DISABLE_CORE,
        [NVDEV_SUBDEV_VM]       = NV_DEVICE_V0_DISABLE_CORE,
index 091f3e12ffc6687aba75b014816e6f32098296c2..377ec0b8851e8a2d8606b1f461dfd302fc6b99c0 100644 (file)
@@ -33,7 +33,7 @@
 #include <subdev/mc.h>
 #include <subdev/timer.h>
 #include <subdev/fb.h>
-#include <subdev/ltcg.h>
+#include <subdev/ltc.h>
 #include <subdev/ibus.h>
 #include <subdev/instmem.h>
 #include <subdev/vm.h>
@@ -72,7 +72,7 @@ gm100_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_BUS    ] =  nvc0_bus_oclass;
                device->oclass[NVDEV_SUBDEV_TIMER  ] = &gk20a_timer_oclass;
                device->oclass[NVDEV_SUBDEV_FB     ] =  gm107_fb_oclass;
-               device->oclass[NVDEV_SUBDEV_LTCG   ] =  gm107_ltcg_oclass;
+               device->oclass[NVDEV_SUBDEV_LTC    ] =  gm107_ltc_oclass;
                device->oclass[NVDEV_SUBDEV_IBUS   ] = &nve0_ibus_oclass;
                device->oclass[NVDEV_SUBDEV_INSTMEM] =  nv50_instmem_oclass;
                device->oclass[NVDEV_SUBDEV_VM     ] = &nvc0_vmmgr_oclass;
index 1d741faa6fe01da9ba0cbd7e027a9c6c6b8d9cc4..b4a2917ce555705b24152714935c6edb0245e681 100644 (file)
@@ -33,7 +33,7 @@
 #include <subdev/mc.h>
 #include <subdev/timer.h>
 #include <subdev/fb.h>
-#include <subdev/ltcg.h>
+#include <subdev/ltc.h>
 #include <subdev/ibus.h>
 #include <subdev/instmem.h>
 #include <subdev/vm.h>
@@ -70,7 +70,7 @@ nvc0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_BUS    ] =  nvc0_bus_oclass;
                device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
                device->oclass[NVDEV_SUBDEV_FB     ] =  nvc0_fb_oclass;
-               device->oclass[NVDEV_SUBDEV_LTCG   ] =  gf100_ltcg_oclass;
+               device->oclass[NVDEV_SUBDEV_LTC    ] =  gf100_ltc_oclass;
                device->oclass[NVDEV_SUBDEV_IBUS   ] = &nvc0_ibus_oclass;
                device->oclass[NVDEV_SUBDEV_INSTMEM] =  nv50_instmem_oclass;
                device->oclass[NVDEV_SUBDEV_VM     ] = &nvc0_vmmgr_oclass;
@@ -102,7 +102,7 @@ nvc0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_BUS    ] =  nvc0_bus_oclass;
                device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
                device->oclass[NVDEV_SUBDEV_FB     ] =  nvc0_fb_oclass;
-               device->oclass[NVDEV_SUBDEV_LTCG   ] =  gf100_ltcg_oclass;
+               device->oclass[NVDEV_SUBDEV_LTC    ] =  gf100_ltc_oclass;
                device->oclass[NVDEV_SUBDEV_IBUS   ] = &nvc0_ibus_oclass;
                device->oclass[NVDEV_SUBDEV_INSTMEM] =  nv50_instmem_oclass;
                device->oclass[NVDEV_SUBDEV_VM     ] = &nvc0_vmmgr_oclass;
@@ -134,7 +134,7 @@ nvc0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_BUS    ] =  nvc0_bus_oclass;
                device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
                device->oclass[NVDEV_SUBDEV_FB     ] =  nvc0_fb_oclass;
-               device->oclass[NVDEV_SUBDEV_LTCG   ] =  gf100_ltcg_oclass;
+               device->oclass[NVDEV_SUBDEV_LTC    ] =  gf100_ltc_oclass;
                device->oclass[NVDEV_SUBDEV_IBUS   ] = &nvc0_ibus_oclass;
                device->oclass[NVDEV_SUBDEV_INSTMEM] =  nv50_instmem_oclass;
                device->oclass[NVDEV_SUBDEV_VM     ] = &nvc0_vmmgr_oclass;
@@ -165,7 +165,7 @@ nvc0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_BUS    ] =  nvc0_bus_oclass;
                device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
                device->oclass[NVDEV_SUBDEV_FB     ] =  nvc0_fb_oclass;
-               device->oclass[NVDEV_SUBDEV_LTCG   ] =  gf100_ltcg_oclass;
+               device->oclass[NVDEV_SUBDEV_LTC    ] =  gf100_ltc_oclass;
                device->oclass[NVDEV_SUBDEV_IBUS   ] = &nvc0_ibus_oclass;
                device->oclass[NVDEV_SUBDEV_INSTMEM] =  nv50_instmem_oclass;
                device->oclass[NVDEV_SUBDEV_VM     ] = &nvc0_vmmgr_oclass;
@@ -197,7 +197,7 @@ nvc0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_BUS    ] =  nvc0_bus_oclass;
                device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
                device->oclass[NVDEV_SUBDEV_FB     ] =  nvc0_fb_oclass;
-               device->oclass[NVDEV_SUBDEV_LTCG   ] =  gf100_ltcg_oclass;
+               device->oclass[NVDEV_SUBDEV_LTC    ] =  gf100_ltc_oclass;
                device->oclass[NVDEV_SUBDEV_IBUS   ] = &nvc0_ibus_oclass;
                device->oclass[NVDEV_SUBDEV_INSTMEM] =  nv50_instmem_oclass;
                device->oclass[NVDEV_SUBDEV_VM     ] = &nvc0_vmmgr_oclass;
@@ -229,7 +229,7 @@ nvc0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_BUS    ] =  nvc0_bus_oclass;
                device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
                device->oclass[NVDEV_SUBDEV_FB     ] =  nvc0_fb_oclass;
-               device->oclass[NVDEV_SUBDEV_LTCG   ] =  gf100_ltcg_oclass;
+               device->oclass[NVDEV_SUBDEV_LTC    ] =  gf100_ltc_oclass;
                device->oclass[NVDEV_SUBDEV_IBUS   ] = &nvc0_ibus_oclass;
                device->oclass[NVDEV_SUBDEV_INSTMEM] =  nv50_instmem_oclass;
                device->oclass[NVDEV_SUBDEV_VM     ] = &nvc0_vmmgr_oclass;
@@ -260,7 +260,7 @@ nvc0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_BUS    ] =  nvc0_bus_oclass;
                device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
                device->oclass[NVDEV_SUBDEV_FB     ] =  nvc0_fb_oclass;
-               device->oclass[NVDEV_SUBDEV_LTCG   ] =  gf100_ltcg_oclass;
+               device->oclass[NVDEV_SUBDEV_LTC    ] =  gf100_ltc_oclass;
                device->oclass[NVDEV_SUBDEV_IBUS   ] = &nvc0_ibus_oclass;
                device->oclass[NVDEV_SUBDEV_INSTMEM] =  nv50_instmem_oclass;
                device->oclass[NVDEV_SUBDEV_VM     ] = &nvc0_vmmgr_oclass;
@@ -292,7 +292,7 @@ nvc0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_BUS    ] =  nvc0_bus_oclass;
                device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
                device->oclass[NVDEV_SUBDEV_FB     ] =  nvc0_fb_oclass;
-               device->oclass[NVDEV_SUBDEV_LTCG   ] =  gf100_ltcg_oclass;
+               device->oclass[NVDEV_SUBDEV_LTC    ] =  gf100_ltc_oclass;
                device->oclass[NVDEV_SUBDEV_IBUS   ] = &nvc0_ibus_oclass;
                device->oclass[NVDEV_SUBDEV_INSTMEM] =  nv50_instmem_oclass;
                device->oclass[NVDEV_SUBDEV_VM     ] = &nvc0_vmmgr_oclass;
@@ -323,7 +323,7 @@ nvc0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_BUS    ] =  nvc0_bus_oclass;
                device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
                device->oclass[NVDEV_SUBDEV_FB     ] =  nvc0_fb_oclass;
-               device->oclass[NVDEV_SUBDEV_LTCG   ] =  gf100_ltcg_oclass;
+               device->oclass[NVDEV_SUBDEV_LTC    ] =  gf100_ltc_oclass;
                device->oclass[NVDEV_SUBDEV_IBUS   ] = &nvc0_ibus_oclass;
                device->oclass[NVDEV_SUBDEV_INSTMEM] =  nv50_instmem_oclass;
                device->oclass[NVDEV_SUBDEV_VM     ] = &nvc0_vmmgr_oclass;
index 51b6af6c956a83e7c06e25b5ad1617c8e40ca156..54ec53bc6252495b973499a1f089847674b1847b 100644 (file)
@@ -33,7 +33,7 @@
 #include <subdev/mc.h>
 #include <subdev/timer.h>
 #include <subdev/fb.h>
-#include <subdev/ltcg.h>
+#include <subdev/ltc.h>
 #include <subdev/ibus.h>
 #include <subdev/instmem.h>
 #include <subdev/vm.h>
@@ -70,7 +70,7 @@ nve0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_BUS    ] =  nvc0_bus_oclass;
                device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
                device->oclass[NVDEV_SUBDEV_FB     ] =  nve0_fb_oclass;
-               device->oclass[NVDEV_SUBDEV_LTCG   ] =  gf100_ltcg_oclass;
+               device->oclass[NVDEV_SUBDEV_LTC    ] =  gk104_ltc_oclass;
                device->oclass[NVDEV_SUBDEV_IBUS   ] = &nve0_ibus_oclass;
                device->oclass[NVDEV_SUBDEV_INSTMEM] =  nv50_instmem_oclass;
                device->oclass[NVDEV_SUBDEV_VM     ] = &nvc0_vmmgr_oclass;
@@ -103,7 +103,7 @@ nve0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_BUS    ] =  nvc0_bus_oclass;
                device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
                device->oclass[NVDEV_SUBDEV_FB     ] =  nve0_fb_oclass;
-               device->oclass[NVDEV_SUBDEV_LTCG   ] =  gf100_ltcg_oclass;
+               device->oclass[NVDEV_SUBDEV_LTC    ] =  gk104_ltc_oclass;
                device->oclass[NVDEV_SUBDEV_IBUS   ] = &nve0_ibus_oclass;
                device->oclass[NVDEV_SUBDEV_INSTMEM] =  nv50_instmem_oclass;
                device->oclass[NVDEV_SUBDEV_VM     ] = &nvc0_vmmgr_oclass;
@@ -136,7 +136,7 @@ nve0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_BUS    ] =  nvc0_bus_oclass;
                device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
                device->oclass[NVDEV_SUBDEV_FB     ] =  nve0_fb_oclass;
-               device->oclass[NVDEV_SUBDEV_LTCG   ] =  gf100_ltcg_oclass;
+               device->oclass[NVDEV_SUBDEV_LTC    ] =  gk104_ltc_oclass;
                device->oclass[NVDEV_SUBDEV_IBUS   ] = &nve0_ibus_oclass;
                device->oclass[NVDEV_SUBDEV_INSTMEM] =  nv50_instmem_oclass;
                device->oclass[NVDEV_SUBDEV_VM     ] = &nvc0_vmmgr_oclass;
@@ -187,7 +187,7 @@ nve0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_BUS    ] =  nvc0_bus_oclass;
                device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
                device->oclass[NVDEV_SUBDEV_FB     ] =  nve0_fb_oclass;
-               device->oclass[NVDEV_SUBDEV_LTCG   ] =  gf100_ltcg_oclass;
+               device->oclass[NVDEV_SUBDEV_LTC    ] =  gk104_ltc_oclass;
                device->oclass[NVDEV_SUBDEV_IBUS   ] = &nve0_ibus_oclass;
                device->oclass[NVDEV_SUBDEV_INSTMEM] =  nv50_instmem_oclass;
                device->oclass[NVDEV_SUBDEV_VM     ] = &nvc0_vmmgr_oclass;
@@ -220,7 +220,7 @@ nve0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_BUS    ] =  nvc0_bus_oclass;
                device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
                device->oclass[NVDEV_SUBDEV_FB     ] =  nve0_fb_oclass;
-               device->oclass[NVDEV_SUBDEV_LTCG   ] =  gf100_ltcg_oclass;
+               device->oclass[NVDEV_SUBDEV_LTC    ] =  gk104_ltc_oclass;
                device->oclass[NVDEV_SUBDEV_IBUS   ] = &nve0_ibus_oclass;
                device->oclass[NVDEV_SUBDEV_INSTMEM] =  nv50_instmem_oclass;
                device->oclass[NVDEV_SUBDEV_VM     ] = &nvc0_vmmgr_oclass;
@@ -253,7 +253,7 @@ nve0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_BUS    ] =  nvc0_bus_oclass;
                device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
                device->oclass[NVDEV_SUBDEV_FB     ] =  nve0_fb_oclass;
-               device->oclass[NVDEV_SUBDEV_LTCG   ] =  gf100_ltcg_oclass;
+               device->oclass[NVDEV_SUBDEV_LTC    ] =  gk104_ltc_oclass;
                device->oclass[NVDEV_SUBDEV_IBUS   ] = &nve0_ibus_oclass;
                device->oclass[NVDEV_SUBDEV_INSTMEM] =  nv50_instmem_oclass;
                device->oclass[NVDEV_SUBDEV_VM     ] = &nvc0_vmmgr_oclass;
index aa62b637c389b08a0aaeabf5f381332760edbb88..8743766454a5fd94133123aaf7acf79b6764f092 100644 (file)
@@ -29,7 +29,7 @@ enum nv_subdev_type {
        NVDEV_SUBDEV_BUS,
        NVDEV_SUBDEV_TIMER,
        NVDEV_SUBDEV_FB,
-       NVDEV_SUBDEV_LTCG,
+       NVDEV_SUBDEV_LTC,
        NVDEV_SUBDEV_IBUS,
        NVDEV_SUBDEV_INSTMEM,
        NVDEV_SUBDEV_VM,
diff --git a/drivers/gpu/drm/nouveau/core/include/subdev/ltc.h b/drivers/gpu/drm/nouveau/core/include/subdev/ltc.h
new file mode 100644 (file)
index 0000000..de9ac03
--- /dev/null
@@ -0,0 +1,28 @@
+#ifndef __NOUVEAU_LTC_H__
+#define __NOUVEAU_LTC_H__
+
+#include <core/subdev.h>
+#include <core/device.h>
+
+struct nouveau_mm_node;
+
+struct nouveau_ltc {
+       struct nouveau_subdev base;
+
+       int  (*tags_alloc)(struct nouveau_ltc *, u32 count,
+                          struct nouveau_mm_node **);
+       void (*tags_free)(struct nouveau_ltc *, struct nouveau_mm_node **);
+       void (*tags_clear)(struct nouveau_ltc *, u32 first, u32 count);
+};
+
+static inline struct nouveau_ltc *
+nouveau_ltc(void *obj)
+{
+       return (void *)nv_device(obj)->subdev[NVDEV_SUBDEV_LTC];
+}
+
+extern struct nouveau_oclass *gf100_ltc_oclass;
+extern struct nouveau_oclass *gk104_ltc_oclass;
+extern struct nouveau_oclass *gm107_ltc_oclass;
+
+#endif
diff --git a/drivers/gpu/drm/nouveau/core/include/subdev/ltcg.h b/drivers/gpu/drm/nouveau/core/include/subdev/ltcg.h
deleted file mode 100644 (file)
index c9c1950..0000000
+++ /dev/null
@@ -1,41 +0,0 @@
-#ifndef __NOUVEAU_LTCG_H__
-#define __NOUVEAU_LTCG_H__
-
-#include <core/subdev.h>
-#include <core/device.h>
-
-struct nouveau_mm_node;
-
-struct nouveau_ltcg {
-       struct nouveau_subdev base;
-
-       int  (*tags_alloc)(struct nouveau_ltcg *, u32 count,
-                          struct nouveau_mm_node **);
-       void (*tags_free)(struct nouveau_ltcg *, struct nouveau_mm_node **);
-       void (*tags_clear)(struct nouveau_ltcg *, u32 first, u32 count);
-};
-
-static inline struct nouveau_ltcg *
-nouveau_ltcg(void *obj)
-{
-       return (void *)nv_device(obj)->subdev[NVDEV_SUBDEV_LTCG];
-}
-
-#define nouveau_ltcg_create(p,e,o,d)                                           \
-       nouveau_subdev_create_((p), (e), (o), 0, "PLTCG", "level2",            \
-                              sizeof(**d), (void **)d)
-#define nouveau_ltcg_destroy(p)                                                \
-       nouveau_subdev_destroy(&(p)->base)
-#define nouveau_ltcg_init(p)                                                   \
-       nouveau_subdev_init(&(p)->base)
-#define nouveau_ltcg_fini(p,s)                                                 \
-       nouveau_subdev_fini(&(p)->base, (s))
-
-#define _nouveau_ltcg_dtor _nouveau_subdev_dtor
-#define _nouveau_ltcg_init _nouveau_subdev_init
-#define _nouveau_ltcg_fini _nouveau_subdev_fini
-
-extern struct nouveau_oclass *gf100_ltcg_oclass;
-extern struct nouveau_oclass *gm107_ltcg_oclass;
-
-#endif
index 5a6a5027f749f4b20cfd2cfc737be3d719e191ab..946518572346adf5d6cc0675c11552300308c8b2 100644 (file)
@@ -26,7 +26,7 @@
 #include <subdev/bios/pll.h>
 #include <subdev/bios/rammap.h>
 #include <subdev/bios/timing.h>
-#include <subdev/ltcg.h>
+#include <subdev/ltc.h>
 
 #include <subdev/clock.h>
 #include <subdev/clock/pll.h>
@@ -425,7 +425,7 @@ extern const u8 nvc0_pte_storage_type_map[256];
 void
 nvc0_ram_put(struct nouveau_fb *pfb, struct nouveau_mem **pmem)
 {
-       struct nouveau_ltcg *ltcg = nouveau_ltcg(pfb);
+       struct nouveau_ltc *ltc = nouveau_ltc(pfb);
        struct nouveau_mem *mem = *pmem;
 
        *pmem = NULL;
@@ -434,7 +434,7 @@ nvc0_ram_put(struct nouveau_fb *pfb, struct nouveau_mem **pmem)
 
        mutex_lock(&pfb->base.mutex);
        if (mem->tag)
-               ltcg->tags_free(ltcg, &mem->tag);
+               ltc->tags_free(ltc, &mem->tag);
        __nv50_ram_put(pfb, mem);
        mutex_unlock(&pfb->base.mutex);
 
@@ -468,12 +468,12 @@ nvc0_ram_get(struct nouveau_fb *pfb, u64 size, u32 align, u32 ncmin,
 
        mutex_lock(&pfb->base.mutex);
        if (comp) {
-               struct nouveau_ltcg *ltcg = nouveau_ltcg(pfb);
+               struct nouveau_ltc *ltc = nouveau_ltc(pfb);
 
                /* compression only works with lpages */
                if (align == (1 << (17 - 12))) {
                        int n = size >> 5;
-                       ltcg->tags_alloc(ltcg, n, &mem->tag);
+                       ltc->tags_alloc(ltc, n, &mem->tag);
                }
 
                if (unlikely(!mem->tag))
diff --git a/drivers/gpu/drm/nouveau/core/subdev/ltc/base.c b/drivers/gpu/drm/nouveau/core/subdev/ltc/base.c
new file mode 100644 (file)
index 0000000..c99bf3f
--- /dev/null
@@ -0,0 +1,80 @@
+/*
+ * Copyright 2014 Red Hat Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Ben Skeggs <bskeggs@redhat.com>
+ */
+
+#include "priv.h"
+
+static int
+nvkm_ltc_tags_alloc(struct nouveau_ltc *ltc, u32 n,
+                   struct nouveau_mm_node **pnode)
+{
+       struct nvkm_ltc_priv *priv = (void *)ltc;
+       int ret;
+
+       ret = nouveau_mm_head(&priv->tags, 1, n, n, 1, pnode);
+       if (ret)
+               *pnode = NULL;
+
+       return ret;
+}
+
+static void
+nvkm_ltc_tags_free(struct nouveau_ltc *ltc, struct nouveau_mm_node **pnode)
+{
+       struct nvkm_ltc_priv *priv = (void *)ltc;
+       nouveau_mm_free(&priv->tags, pnode);
+}
+
+static void
+nvkm_ltc_tags_clear(struct nouveau_ltc *ltc, u32 first, u32 count)
+{
+       const struct nvkm_ltc_impl *impl = (void *)nv_oclass(ltc);
+       struct nvkm_ltc_priv *priv = (void *)ltc;
+       const u32 limit = first + count - 1;
+
+       BUG_ON((first > limit) || (limit >= priv->num_tags));
+
+       impl->cbc_clear(priv, first, limit);
+       impl->cbc_wait(priv);
+}
+
+int
+nvkm_ltc_create_(struct nouveau_object *parent, struct nouveau_object *engine,
+                struct nouveau_oclass *oclass, int length, void **pobject)
+{
+       const struct nvkm_ltc_impl *impl = (void *)oclass;
+       struct nvkm_ltc_priv *priv;
+       int ret;
+
+       ret = nouveau_subdev_create_(parent, engine, oclass, 0, "PLTCG",
+                                    "l2c", length, pobject);
+       priv = *pobject;
+       if (ret)
+               return ret;
+
+       priv->base.base.intr = impl->intr;
+       priv->base.tags_alloc = nvkm_ltc_tags_alloc;
+       priv->base.tags_free = nvkm_ltc_tags_free;
+       priv->base.tags_clear = nvkm_ltc_tags_clear;
+       return 0;
+}
diff --git a/drivers/gpu/drm/nouveau/core/subdev/ltc/gf100.c b/drivers/gpu/drm/nouveau/core/subdev/ltc/gf100.c
new file mode 100644 (file)
index 0000000..f72ab81
--- /dev/null
@@ -0,0 +1,197 @@
+/*
+ * Copyright 2012 Red Hat Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Ben Skeggs
+ */
+
+#include <subdev/fb.h>
+#include <subdev/timer.h>
+
+#include "priv.h"
+
+void
+gf100_ltc_cbc_clear(struct nvkm_ltc_priv *priv, u32 start, u32 limit)
+{
+       nv_wr32(priv, 0x17e8cc, start);
+       nv_wr32(priv, 0x17e8d0, limit);
+       nv_wr32(priv, 0x17e8c8, 0x00000004);
+}
+
+void
+gf100_ltc_cbc_wait(struct nvkm_ltc_priv *priv)
+{
+       int c, s;
+       for (c = 0; c < priv->ltc_nr; c++) {
+               for (s = 0; s < priv->lts_nr; s++)
+                       nv_wait(priv, 0x1410c8 + c * 0x2000 + s * 0x400, ~0, 0);
+       }
+}
+
+static void
+gf100_ltc_lts_isr(struct nvkm_ltc_priv *priv, int ltc, int lts)
+{
+       u32 base = 0x141000 + (ltc * 0x2000) + (lts * 0x400);
+       u32 stat = nv_rd32(priv, base + 0x020);
+
+       if (stat) {
+               nv_info(priv, "LTC%d_LTS%d: 0x%08x\n", ltc, lts, stat);
+               nv_wr32(priv, base + 0x020, stat);
+       }
+}
+
+void
+gf100_ltc_intr(struct nouveau_subdev *subdev)
+{
+       struct nvkm_ltc_priv *priv = (void *)subdev;
+       u32 mask;
+
+       mask = nv_rd32(priv, 0x00017c);
+       while (mask) {
+               u32 lts, ltc = __ffs(mask);
+               for (lts = 0; lts < priv->lts_nr; lts++)
+                       gf100_ltc_lts_isr(priv, ltc, lts);
+               mask &= ~(1 << ltc);
+       }
+
+       /* we do something horribly wrong and upset PMFB a lot, so mask off
+        * interrupts from it after the first one until it's fixed
+        */
+       nv_mask(priv, 0x000640, 0x02000000, 0x00000000);
+}
+
+static int
+gf100_ltc_init(struct nouveau_object *object)
+{
+       struct nvkm_ltc_priv *priv = (void *)object;
+       int ret;
+
+       ret = nvkm_ltc_init(priv);
+       if (ret)
+               return ret;
+
+       nv_mask(priv, 0x17e820, 0x00100000, 0x00000000); /* INTR_EN &= ~0x10 */
+       nv_wr32(priv, 0x17e8d8, priv->ltc_nr);
+       nv_wr32(priv, 0x17e8d4, priv->tag_base);
+       return 0;
+}
+
+void
+gf100_ltc_dtor(struct nouveau_object *object)
+{
+       struct nouveau_fb *pfb = nouveau_fb(object);
+       struct nvkm_ltc_priv *priv = (void *)object;
+
+       nouveau_mm_fini(&priv->tags);
+       nouveau_mm_free(&pfb->vram, &priv->tag_ram);
+
+       nvkm_ltc_destroy(priv);
+}
+
+/* TODO: Figure out tag memory details and drop the over-cautious allocation.
+ */
+int
+gf100_ltc_init_tag_ram(struct nouveau_fb *pfb, struct nvkm_ltc_priv *priv)
+{
+       u32 tag_size, tag_margin, tag_align;
+       int ret;
+
+       /* tags for 1/4 of VRAM should be enough (8192/4 per GiB of VRAM) */
+       priv->num_tags = (pfb->ram->size >> 17) / 4;
+       if (priv->num_tags > (1 << 17))
+               priv->num_tags = 1 << 17; /* we have 17 bits in PTE */
+       priv->num_tags = (priv->num_tags + 63) & ~63; /* round up to 64 */
+
+       tag_align = priv->ltc_nr * 0x800;
+       tag_margin = (tag_align < 0x6000) ? 0x6000 : tag_align;
+
+       /* 4 part 4 sub: 0x2000 bytes for 56 tags */
+       /* 3 part 4 sub: 0x6000 bytes for 168 tags */
+       /*
+        * About 147 bytes per tag. Let's be safe and allocate x2, which makes
+        * 0x4980 bytes for 64 tags, and round up to 0x6000 bytes for 64 tags.
+        *
+        * For 4 GiB of memory we'll have 8192 tags which makes 3 MiB, < 0.1 %.
+        */
+       tag_size  = (priv->num_tags / 64) * 0x6000 + tag_margin;
+       tag_size += tag_align;
+       tag_size  = (tag_size + 0xfff) >> 12; /* round up */
+
+       ret = nouveau_mm_tail(&pfb->vram, 1, tag_size, tag_size, 1,
+                             &priv->tag_ram);
+       if (ret) {
+               priv->num_tags = 0;
+       } else {
+               u64 tag_base = (priv->tag_ram->offset << 12) + tag_margin;
+
+               tag_base += tag_align - 1;
+               ret = do_div(tag_base, tag_align);
+
+               priv->tag_base = tag_base;
+       }
+
+       ret = nouveau_mm_init(&priv->tags, 0, priv->num_tags, 1);
+       return ret;
+}
+
+int
+gf100_ltc_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
+              struct nouveau_oclass *oclass, void *data, u32 size,
+              struct nouveau_object **pobject)
+{
+       struct nouveau_fb *pfb = nouveau_fb(parent);
+       struct nvkm_ltc_priv *priv;
+       u32 parts, mask;
+       int ret, i;
+
+       ret = nvkm_ltc_create(parent, engine, oclass, &priv);
+       *pobject = nv_object(priv);
+       if (ret)
+               return ret;
+
+       parts = nv_rd32(priv, 0x022438);
+       mask = nv_rd32(priv, 0x022554);
+       for (i = 0; i < parts; i++) {
+               if (!(mask & (1 << i)))
+                       priv->ltc_nr++;
+       }
+       priv->lts_nr = nv_rd32(priv, 0x17e8dc) >> 28;
+
+       ret = gf100_ltc_init_tag_ram(pfb, priv);
+       if (ret)
+               return ret;
+
+       nv_subdev(priv)->intr = gf100_ltc_intr;
+       return 0;
+}
+
+struct nouveau_oclass *
+gf100_ltc_oclass = &(struct nvkm_ltc_impl) {
+       .base.handle = NV_SUBDEV(LTC, 0xc0),
+       .base.ofuncs = &(struct nouveau_ofuncs) {
+               .ctor = gf100_ltc_ctor,
+               .dtor = gf100_ltc_dtor,
+               .init = gf100_ltc_init,
+               .fini = _nvkm_ltc_fini,
+       },
+       .intr = gf100_ltc_intr,
+       .cbc_clear = gf100_ltc_cbc_clear,
+       .cbc_wait = gf100_ltc_cbc_wait,
+}.base;
diff --git a/drivers/gpu/drm/nouveau/core/subdev/ltc/gk104.c b/drivers/gpu/drm/nouveau/core/subdev/ltc/gk104.c
new file mode 100644 (file)
index 0000000..063caf7
--- /dev/null
@@ -0,0 +1,55 @@
+/*
+ * Copyright 2012 Red Hat Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Ben Skeggs
+ */
+
+#include "priv.h"
+
+static int
+gk104_ltc_init(struct nouveau_object *object)
+{
+       struct nvkm_ltc_priv *priv = (void *)object;
+       int ret;
+
+       ret = nvkm_ltc_init(priv);
+       if (ret)
+               return ret;
+
+       nv_wr32(priv, 0x17e8d8, priv->ltc_nr);
+       nv_wr32(priv, 0x17e000, priv->ltc_nr);
+       nv_wr32(priv, 0x17e8d4, priv->tag_base);
+       return 0;
+}
+
+struct nouveau_oclass *
+gk104_ltc_oclass = &(struct nvkm_ltc_impl) {
+       .base.handle = NV_SUBDEV(LTC, 0xe4),
+       .base.ofuncs = &(struct nouveau_ofuncs) {
+               .ctor = gf100_ltc_ctor,
+               .dtor = gf100_ltc_dtor,
+               .init = gk104_ltc_init,
+               .fini = _nvkm_ltc_fini,
+       },
+       .intr = gf100_ltc_intr,
+       .cbc_clear = gf100_ltc_cbc_clear,
+       .cbc_wait = gf100_ltc_cbc_wait,
+}.base;
diff --git a/drivers/gpu/drm/nouveau/core/subdev/ltc/gm107.c b/drivers/gpu/drm/nouveau/core/subdev/ltc/gm107.c
new file mode 100644 (file)
index 0000000..c05333e
--- /dev/null
@@ -0,0 +1,137 @@
+/*
+ * Copyright 2014 Red Hat Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Ben Skeggs
+ */
+
+#include <subdev/fb.h>
+#include <subdev/timer.h>
+
+#include "priv.h"
+
+static void
+gm107_ltc_cbc_clear(struct nvkm_ltc_priv *priv, u32 start, u32 limit)
+{
+       nv_wr32(priv, 0x17e270, start);
+       nv_wr32(priv, 0x17e274, limit);
+       nv_wr32(priv, 0x17e26c, 0x00000004);
+}
+
+static void
+gm107_ltc_cbc_wait(struct nvkm_ltc_priv *priv)
+{
+       int c, s;
+       for (c = 0; c < priv->ltc_nr; c++) {
+               for (s = 0; s < priv->lts_nr; s++)
+                       nv_wait(priv, 0x14046c + c * 0x2000 + s * 0x200, ~0, 0);
+       }
+}
+
+static void
+gm107_ltc_lts_isr(struct nvkm_ltc_priv *priv, int ltc, int lts)
+{
+       u32 base = 0x140000 + (ltc * 0x2000) + (lts * 0x400);
+       u32 stat = nv_rd32(priv, base + 0x00c);
+
+       if (stat) {
+               nv_info(priv, "LTC%d_LTS%d: 0x%08x\n", ltc, lts, stat);
+               nv_wr32(priv, base + 0x00c, stat);
+       }
+}
+
+static void
+gm107_ltc_intr(struct nouveau_subdev *subdev)
+{
+       struct nvkm_ltc_priv *priv = (void *)subdev;
+       u32 mask;
+
+       mask = nv_rd32(priv, 0x00017c);
+       while (mask) {
+               u32 lts, ltc = __ffs(mask);
+               for (lts = 0; lts < priv->lts_nr; lts++)
+                       gm107_ltc_lts_isr(priv, ltc, lts);
+               mask &= ~(1 << ltc);
+       }
+
+       /* we do something horribly wrong and upset PMFB a lot, so mask off
+        * interrupts from it after the first one until it's fixed
+        */
+       nv_mask(priv, 0x000640, 0x02000000, 0x00000000);
+}
+
+static int
+gm107_ltc_init(struct nouveau_object *object)
+{
+       struct nvkm_ltc_priv *priv = (void *)object;
+       int ret;
+
+       ret = nvkm_ltc_init(priv);
+       if (ret)
+               return ret;
+
+       nv_wr32(priv, 0x17e27c, priv->ltc_nr);
+       nv_wr32(priv, 0x17e278, priv->tag_base);
+       return 0;
+}
+
+static int
+gm107_ltc_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
+              struct nouveau_oclass *oclass, void *data, u32 size,
+              struct nouveau_object **pobject)
+{
+       struct nouveau_fb *pfb = nouveau_fb(parent);
+       struct nvkm_ltc_priv *priv;
+       u32 parts, mask;
+       int ret, i;
+
+       ret = nvkm_ltc_create(parent, engine, oclass, &priv);
+       *pobject = nv_object(priv);
+       if (ret)
+               return ret;
+
+       parts = nv_rd32(priv, 0x022438);
+       mask = nv_rd32(priv, 0x021c14);
+       for (i = 0; i < parts; i++) {
+               if (!(mask & (1 << i)))
+                       priv->ltc_nr++;
+       }
+       priv->lts_nr = nv_rd32(priv, 0x17e280) >> 28;
+
+       ret = gf100_ltc_init_tag_ram(pfb, priv);
+       if (ret)
+               return ret;
+
+       return 0;
+}
+
+struct nouveau_oclass *
+gm107_ltc_oclass = &(struct nvkm_ltc_impl) {
+       .base.handle = NV_SUBDEV(LTC, 0xff),
+       .base.ofuncs = &(struct nouveau_ofuncs) {
+               .ctor = gm107_ltc_ctor,
+               .dtor = gf100_ltc_dtor,
+               .init = gm107_ltc_init,
+               .fini = _nvkm_ltc_fini,
+       },
+       .intr = gm107_ltc_intr,
+       .cbc_clear = gm107_ltc_cbc_clear,
+       .cbc_wait = gm107_ltc_cbc_wait,
+}.base;
diff --git a/drivers/gpu/drm/nouveau/core/subdev/ltc/priv.h b/drivers/gpu/drm/nouveau/core/subdev/ltc/priv.h
new file mode 100644 (file)
index 0000000..96d12a2
--- /dev/null
@@ -0,0 +1,58 @@
+#ifndef __NVKM_LTC_PRIV_H__
+#define __NVKM_LTC_PRIV_H__
+
+#include <subdev/ltc.h>
+#include <subdev/fb.h>
+
+struct nvkm_ltc_priv {
+       struct nouveau_ltc base;
+       u32 ltc_nr;
+       u32 lts_nr;
+       u32 num_tags;
+       u32 tag_base;
+       struct nouveau_mm tags;
+       struct nouveau_mm_node *tag_ram;
+};
+
+#define nvkm_ltc_create(p,e,o,d)                                               \
+       nvkm_ltc_create_((p), (e), (o), sizeof(**d), (void **)d)
+#define nvkm_ltc_destroy(p) ({                                                 \
+       struct nvkm_ltc_priv *_priv = (p);                                     \
+       _nvkm_ltc_dtor(nv_object(_priv));                                      \
+})
+#define nvkm_ltc_init(p) ({                                                    \
+       struct nvkm_ltc_priv *_priv = (p);                                     \
+       _nvkm_ltc_init(nv_object(_priv));                                      \
+})
+#define nvkm_ltc_fini(p,s) ({                                                  \
+       struct nvkm_ltc_priv *_priv = (p);                                     \
+       _nvkm_ltc_fini(nv_object(_priv), (s));                                 \
+})
+
+int  nvkm_ltc_create_(struct nouveau_object *, struct nouveau_object *,
+                     struct nouveau_oclass *, int, void **);
+
+#define _nvkm_ltc_dtor _nouveau_subdev_dtor
+#define _nvkm_ltc_init _nouveau_subdev_init
+#define _nvkm_ltc_fini _nouveau_subdev_fini
+
+int  gf100_ltc_ctor(struct nouveau_object *, struct nouveau_object *,
+                   struct nouveau_oclass *, void *, u32,
+                   struct nouveau_object **);
+void gf100_ltc_dtor(struct nouveau_object *);
+int  gf100_ltc_init_tag_ram(struct nouveau_fb *, struct nvkm_ltc_priv *);
+int  gf100_ltc_tags_alloc(struct nouveau_ltc *, u32, struct nouveau_mm_node **);
+void gf100_ltc_tags_free(struct nouveau_ltc *, struct nouveau_mm_node **);
+
+struct nvkm_ltc_impl {
+       struct nouveau_oclass base;
+       void (*intr)(struct nouveau_subdev *);
+       void (*cbc_clear)(struct nvkm_ltc_priv *, u32 start, u32 limit);
+       void (*cbc_wait)(struct nvkm_ltc_priv *);
+};
+
+void gf100_ltc_intr(struct nouveau_subdev *);
+void gf100_ltc_cbc_clear(struct nvkm_ltc_priv *, u32, u32);
+void gf100_ltc_cbc_wait(struct nvkm_ltc_priv *);
+
+#endif
diff --git a/drivers/gpu/drm/nouveau/core/subdev/ltcg/gf100.c b/drivers/gpu/drm/nouveau/core/subdev/ltcg/gf100.c
deleted file mode 100644 (file)
index f2f3338..0000000
+++ /dev/null
@@ -1,226 +0,0 @@
-/*
- * Copyright 2012 Red Hat Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors: Ben Skeggs
- */
-
-#include <subdev/fb.h>
-#include <subdev/timer.h>
-
-#include "gf100.h"
-
-static void
-gf100_ltcg_lts_isr(struct gf100_ltcg_priv *priv, int ltc, int lts)
-{
-       u32 base = 0x141000 + (ltc * 0x2000) + (lts * 0x400);
-       u32 stat = nv_rd32(priv, base + 0x020);
-
-       if (stat) {
-               nv_info(priv, "LTC%d_LTS%d: 0x%08x\n", ltc, lts, stat);
-               nv_wr32(priv, base + 0x020, stat);
-       }
-}
-
-static void
-gf100_ltcg_intr(struct nouveau_subdev *subdev)
-{
-       struct gf100_ltcg_priv *priv = (void *)subdev;
-       u32 mask;
-
-       mask = nv_rd32(priv, 0x00017c);
-       while (mask) {
-               u32 lts, ltc = __ffs(mask);
-               for (lts = 0; lts < priv->lts_nr; lts++)
-                       gf100_ltcg_lts_isr(priv, ltc, lts);
-               mask &= ~(1 << ltc);
-       }
-
-       /* we do something horribly wrong and upset PMFB a lot, so mask off
-        * interrupts from it after the first one until it's fixed
-        */
-       nv_mask(priv, 0x000640, 0x02000000, 0x00000000);
-}
-
-int
-gf100_ltcg_tags_alloc(struct nouveau_ltcg *ltcg, u32 n,
-                    struct nouveau_mm_node **pnode)
-{
-       struct gf100_ltcg_priv *priv = (struct gf100_ltcg_priv *)ltcg;
-       int ret;
-
-       ret = nouveau_mm_head(&priv->tags, 1, n, n, 1, pnode);
-       if (ret)
-               *pnode = NULL;
-
-       return ret;
-}
-
-void
-gf100_ltcg_tags_free(struct nouveau_ltcg *ltcg, struct nouveau_mm_node **pnode)
-{
-       struct gf100_ltcg_priv *priv = (struct gf100_ltcg_priv *)ltcg;
-
-       nouveau_mm_free(&priv->tags, pnode);
-}
-
-static void
-gf100_ltcg_tags_clear(struct nouveau_ltcg *ltcg, u32 first, u32 count)
-{
-       struct gf100_ltcg_priv *priv = (struct gf100_ltcg_priv *)ltcg;
-       u32 last = first + count - 1;
-       int p, i;
-
-       BUG_ON((first > last) || (last >= priv->num_tags));
-
-       nv_wr32(priv, 0x17e8cc, first);
-       nv_wr32(priv, 0x17e8d0, last);
-       nv_wr32(priv, 0x17e8c8, 0x4); /* trigger clear */
-
-       /* wait until it's finished with clearing */
-       for (p = 0; p < priv->ltc_nr; ++p) {
-               for (i = 0; i < priv->lts_nr; ++i)
-                       nv_wait(priv, 0x1410c8 + p * 0x2000 + i * 0x400, ~0, 0);
-       }
-}
-
-/* TODO: Figure out tag memory details and drop the over-cautious allocation.
- */
-int
-gf100_ltcg_init_tag_ram(struct nouveau_fb *pfb, struct gf100_ltcg_priv *priv)
-{
-       u32 tag_size, tag_margin, tag_align;
-       int ret;
-
-       /* tags for 1/4 of VRAM should be enough (8192/4 per GiB of VRAM) */
-       priv->num_tags = (pfb->ram->size >> 17) / 4;
-       if (priv->num_tags > (1 << 17))
-               priv->num_tags = 1 << 17; /* we have 17 bits in PTE */
-       priv->num_tags = (priv->num_tags + 63) & ~63; /* round up to 64 */
-
-       tag_align = priv->ltc_nr * 0x800;
-       tag_margin = (tag_align < 0x6000) ? 0x6000 : tag_align;
-
-       /* 4 part 4 sub: 0x2000 bytes for 56 tags */
-       /* 3 part 4 sub: 0x6000 bytes for 168 tags */
-       /*
-        * About 147 bytes per tag. Let's be safe and allocate x2, which makes
-        * 0x4980 bytes for 64 tags, and round up to 0x6000 bytes for 64 tags.
-        *
-        * For 4 GiB of memory we'll have 8192 tags which makes 3 MiB, < 0.1 %.
-        */
-       tag_size  = (priv->num_tags / 64) * 0x6000 + tag_margin;
-       tag_size += tag_align;
-       tag_size  = (tag_size + 0xfff) >> 12; /* round up */
-
-       ret = nouveau_mm_tail(&pfb->vram, 1, tag_size, tag_size, 1,
-                             &priv->tag_ram);
-       if (ret) {
-               priv->num_tags = 0;
-       } else {
-               u64 tag_base = (priv->tag_ram->offset << 12) + tag_margin;
-
-               tag_base += tag_align - 1;
-               ret = do_div(tag_base, tag_align);
-
-               priv->tag_base = tag_base;
-       }
-       ret = nouveau_mm_init(&priv->tags, 0, priv->num_tags, 1);
-
-       return ret;
-}
-
-static int
-gf100_ltcg_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
-              struct nouveau_oclass *oclass, void *data, u32 size,
-              struct nouveau_object **pobject)
-{
-       struct gf100_ltcg_priv *priv;
-       struct nouveau_fb *pfb = nouveau_fb(parent);
-       u32 parts, mask;
-       int ret, i;
-
-       ret = nouveau_ltcg_create(parent, engine, oclass, &priv);
-       *pobject = nv_object(priv);
-       if (ret)
-               return ret;
-
-       parts = nv_rd32(priv, 0x022438);
-       mask = nv_rd32(priv, 0x022554);
-       for (i = 0; i < parts; i++) {
-               if (!(mask & (1 << i)))
-                       priv->ltc_nr++;
-       }
-       priv->lts_nr = nv_rd32(priv, 0x17e8dc) >> 28;
-
-       ret = gf100_ltcg_init_tag_ram(pfb, priv);
-       if (ret)
-               return ret;
-
-       priv->base.tags_alloc = gf100_ltcg_tags_alloc;
-       priv->base.tags_free  = gf100_ltcg_tags_free;
-       priv->base.tags_clear = gf100_ltcg_tags_clear;
-
-       nv_subdev(priv)->intr = gf100_ltcg_intr;
-       return 0;
-}
-
-void
-gf100_ltcg_dtor(struct nouveau_object *object)
-{
-       struct nouveau_ltcg *ltcg = (struct nouveau_ltcg *)object;
-       struct gf100_ltcg_priv *priv = (struct gf100_ltcg_priv *)ltcg;
-       struct nouveau_fb *pfb = nouveau_fb(ltcg->base.base.parent);
-
-       nouveau_mm_fini(&priv->tags);
-       nouveau_mm_free(&pfb->vram, &priv->tag_ram);
-
-       nouveau_ltcg_destroy(ltcg);
-}
-
-static int
-gf100_ltcg_init(struct nouveau_object *object)
-{
-       struct nouveau_ltcg *ltcg = (struct nouveau_ltcg *)object;
-       struct gf100_ltcg_priv *priv = (struct gf100_ltcg_priv *)ltcg;
-       int ret;
-
-       ret = nouveau_ltcg_init(ltcg);
-       if (ret)
-               return ret;
-
-       nv_mask(priv, 0x17e820, 0x00100000, 0x00000000); /* INTR_EN &= ~0x10 */
-       nv_wr32(priv, 0x17e8d8, priv->ltc_nr);
-       if (nv_device(ltcg)->card_type >= NV_E0)
-               nv_wr32(priv, 0x17e000, priv->ltc_nr);
-       nv_wr32(priv, 0x17e8d4, priv->tag_base);
-       return 0;
-}
-
-struct nouveau_oclass *
-gf100_ltcg_oclass = &(struct nouveau_oclass) {
-       .handle = NV_SUBDEV(LTCG, 0xc0),
-       .ofuncs = &(struct nouveau_ofuncs) {
-               .ctor = gf100_ltcg_ctor,
-               .dtor = gf100_ltcg_dtor,
-               .init = gf100_ltcg_init,
-               .fini = _nouveau_ltcg_fini,
-       },
-};
diff --git a/drivers/gpu/drm/nouveau/core/subdev/ltcg/gf100.h b/drivers/gpu/drm/nouveau/core/subdev/ltcg/gf100.h
deleted file mode 100644 (file)
index 87b10b8..0000000
+++ /dev/null
@@ -1,21 +0,0 @@
-#ifndef __NVKM_LTCG_PRIV_GF100_H__
-#define __NVKM_LTCG_PRIV_GF100_H__
-
-#include <subdev/ltcg.h>
-
-struct gf100_ltcg_priv {
-       struct nouveau_ltcg base;
-       u32 ltc_nr;
-       u32 lts_nr;
-       u32 num_tags;
-       u32 tag_base;
-       struct nouveau_mm tags;
-       struct nouveau_mm_node *tag_ram;
-};
-
-void gf100_ltcg_dtor(struct nouveau_object *);
-int  gf100_ltcg_init_tag_ram(struct nouveau_fb *, struct gf100_ltcg_priv *);
-int  gf100_ltcg_tags_alloc(struct nouveau_ltcg *, u32, struct nouveau_mm_node **);
-void gf100_ltcg_tags_free(struct nouveau_ltcg *, struct nouveau_mm_node **);
-
-#endif
diff --git a/drivers/gpu/drm/nouveau/core/subdev/ltcg/gm107.c b/drivers/gpu/drm/nouveau/core/subdev/ltcg/gm107.c
deleted file mode 100644 (file)
index e79d0e8..0000000
+++ /dev/null
@@ -1,142 +0,0 @@
-/*
- * Copyright 2014 Red Hat Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors: Ben Skeggs
- */
-
-#include <subdev/fb.h>
-#include <subdev/timer.h>
-
-#include "gf100.h"
-
-static void
-gm107_ltcg_lts_isr(struct gf100_ltcg_priv *priv, int ltc, int lts)
-{
-       u32 base = 0x140000 + (ltc * 0x2000) + (lts * 0x400);
-       u32 stat = nv_rd32(priv, base + 0x00c);
-
-       if (stat) {
-               nv_info(priv, "LTC%d_LTS%d: 0x%08x\n", ltc, lts, stat);
-               nv_wr32(priv, base + 0x00c, stat);
-       }
-}
-
-static void
-gm107_ltcg_intr(struct nouveau_subdev *subdev)
-{
-       struct gf100_ltcg_priv *priv = (void *)subdev;
-       u32 mask;
-
-       mask = nv_rd32(priv, 0x00017c);
-       while (mask) {
-               u32 lts, ltc = __ffs(mask);
-               for (lts = 0; lts < priv->lts_nr; lts++)
-                       gm107_ltcg_lts_isr(priv, ltc, lts);
-               mask &= ~(1 << ltc);
-       }
-
-       /* we do something horribly wrong and upset PMFB a lot, so mask off
-        * interrupts from it after the first one until it's fixed
-        */
-       nv_mask(priv, 0x000640, 0x02000000, 0x00000000);
-}
-
-static void
-gm107_ltcg_tags_clear(struct nouveau_ltcg *ltcg, u32 first, u32 count)
-{
-       struct gf100_ltcg_priv *priv = (struct gf100_ltcg_priv *)ltcg;
-       u32 last = first + count - 1;
-       int p, i;
-
-       BUG_ON((first > last) || (last >= priv->num_tags));
-
-       nv_wr32(priv, 0x17e270, first);
-       nv_wr32(priv, 0x17e274, last);
-       nv_wr32(priv, 0x17e26c, 0x4); /* trigger clear */
-
-       /* wait until it's finished with clearing */
-       for (p = 0; p < priv->ltc_nr; ++p) {
-               for (i = 0; i < priv->lts_nr; ++i)
-                       nv_wait(priv, 0x14046c + p * 0x2000 + i * 0x200, ~0, 0);
-       }
-}
-
-static int
-gm107_ltcg_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
-              struct nouveau_oclass *oclass, void *data, u32 size,
-              struct nouveau_object **pobject)
-{
-       struct gf100_ltcg_priv *priv;
-       struct nouveau_fb *pfb = nouveau_fb(parent);
-       u32 parts, mask;
-       int ret, i;
-
-       ret = nouveau_ltcg_create(parent, engine, oclass, &priv);
-       *pobject = nv_object(priv);
-       if (ret)
-               return ret;
-
-       parts = nv_rd32(priv, 0x022438);
-       mask = nv_rd32(priv, 0x021c14);
-       for (i = 0; i < parts; i++) {
-               if (!(mask & (1 << i)))
-                       priv->ltc_nr++;
-       }
-       priv->lts_nr = nv_rd32(priv, 0x17e280) >> 28;
-
-       ret = gf100_ltcg_init_tag_ram(pfb, priv);
-       if (ret)
-               return ret;
-
-       priv->base.tags_alloc = gf100_ltcg_tags_alloc;
-       priv->base.tags_free  = gf100_ltcg_tags_free;
-       priv->base.tags_clear = gm107_ltcg_tags_clear;
-
-       nv_subdev(priv)->intr = gm107_ltcg_intr;
-       return 0;
-}
-
-static int
-gm107_ltcg_init(struct nouveau_object *object)
-{
-       struct nouveau_ltcg *ltcg = (struct nouveau_ltcg *)object;
-       struct gf100_ltcg_priv *priv = (struct gf100_ltcg_priv *)ltcg;
-       int ret;
-
-       ret = nouveau_ltcg_init(ltcg);
-       if (ret)
-               return ret;
-
-       nv_wr32(priv, 0x17e27c, priv->ltc_nr);
-       nv_wr32(priv, 0x17e278, priv->tag_base);
-       return 0;
-}
-
-struct nouveau_oclass *
-gm107_ltcg_oclass = &(struct nouveau_oclass) {
-       .handle = NV_SUBDEV(LTCG, 0xff),
-       .ofuncs = &(struct nouveau_ofuncs) {
-               .ctor = gm107_ltcg_ctor,
-               .dtor = gf100_ltcg_dtor,
-               .init = gm107_ltcg_init,
-               .fini = _nouveau_ltcg_fini,
-       },
-};
index 2b4af9610ee9775ec7437a806d99f476182384f4..15d41dc176ffaeff2eca2c04b03b58eb30b90932 100644 (file)
@@ -41,7 +41,7 @@ nvc0_mc_intr[] = {
        { 0x00200000, NVDEV_SUBDEV_GPIO },      /* PMGR->GPIO */
        { 0x00200000, NVDEV_SUBDEV_I2C },       /* PMGR->I2C/AUX */
        { 0x01000000, NVDEV_SUBDEV_PWR },
-       { 0x02000000, NVDEV_SUBDEV_LTCG },
+       { 0x02000000, NVDEV_SUBDEV_LTC },
        { 0x08000000, NVDEV_SUBDEV_FB },
        { 0x10000000, NVDEV_SUBDEV_BUS },
        { 0x40000000, NVDEV_SUBDEV_IBUS },
index 668cf964e4a90af5e65681961f53400c7be3f96e..2d0988755530d1d03ba4322232a565493d2edf03 100644 (file)
@@ -28,7 +28,7 @@
 #include <subdev/timer.h>
 #include <subdev/fb.h>
 #include <subdev/vm.h>
-#include <subdev/ltcg.h>
+#include <subdev/ltc.h>
 #include <subdev/bar.h>
 
 struct nvc0_vmmgr_priv {
@@ -116,12 +116,12 @@ nvc0_vm_map(struct nouveau_vma *vma, struct nouveau_gpuobj *pgt,
        pte <<= 3;
 
        if (mem->tag) {
-               struct nouveau_ltcg *ltcg =
-                       nouveau_ltcg(vma->vm->vmm->base.base.parent);
+               struct nouveau_ltc *ltc =
+                       nouveau_ltc(vma->vm->vmm->base.base.parent);
                u32 tag = mem->tag->offset + (delta >> 17);
                phys |= (u64)tag << (32 + 12);
                next |= (u64)1   << (32 + 12);
-               ltcg->tags_clear(ltcg, tag, cnt);
+               ltc->tags_clear(ltc, tag, cnt);
        }
 
        while (cnt--) {