dt-bindings: Update the riscv,isa string description
authorAtish Patra <atish.patra@wdc.com>
Sat, 3 Aug 2019 04:27:23 +0000 (21:27 -0700)
committerPaul Walmsley <paul.walmsley@sifive.com>
Thu, 8 Aug 2019 23:05:38 +0000 (16:05 -0700)
Since the RISC-V specification states that ISA description strings are
case-insensitive, there's no functional difference between mixed-case,
upper-case, and lower-case ISA strings. Thus, to simplify parsing,
specify that the letters present in "riscv,isa" must be all lowercase.

Suggested-by: Paul Walmsley <paul.walmsley@sifive.com>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
Documentation/devicetree/bindings/riscv/cpus.yaml

index c899111aa5e3799cf84524d932dbd55448164c0f..9d3fe6aada2b979c564e604d183849e286774712 100644 (file)
@@ -50,6 +50,10 @@ properties:
       User-Level ISA document, available from
       https://riscv.org/specifications/
 
+      While the isa strings in ISA specification are case
+      insensitive, letters in the riscv,isa string must be all
+      lowercase to simplify parsing.
+
   timebase-frequency:
     type: integer
     minimum: 1