KVM: x86: Reject loading KVM if host.PAT[0] != WB

Reject KVM if entry '0' in the host's IA32_PAT MSR is not programmed to
writeback (WB) memtype.  KVM subtly relies on IA32_PAT entry '0' to be
programmed to WB by leaving the PAT bits in shadow paging and NPT SPTEs
as '0'.  If something other than WB is in PAT[0], at _best_ guests will
suffer very poor performance, and at worst KVM will crash the system by
breaking cache-coherency expecations (e.g. using WC for guest memory).

Signed-off-by: Sean Christopherson <seanjc@google.com>
Reviewed-by: Maxim Levitsky <mlevitsk@redhat.com>
Message-Id: <20220715230016.3762909-2-seanjc@google.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index f389691d8c04a35cb666dbd17b4801d5bd4502cb..12199c40f2bc54c5358d72d1ce33d4287c6d7c07 100644 (file)
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -9141,6 +9141,7 @@ static struct notifier_block pvclock_gtod_notifier = {
 int kvm_arch_init(void *opaque)
 {
        struct kvm_x86_init_ops *ops = opaque;
+       u64 host_pat;
        int r;
 
        if (kvm_x86_ops.hardware_enable) {
@@ -9179,6 +9180,20 @@ int kvm_arch_init(void *opaque)
                goto out;
        }
 
+       /*
+        * KVM assumes that PAT entry '0' encodes WB memtype and simply zeroes
+        * the PAT bits in SPTEs.  Bail if PAT[0] is programmed to something
+        * other than WB.  Note, EPT doesn't utilize the PAT, but don't bother
+        * with an exception.  PAT[0] is set to WB on RESET and also by the
+        * kernel, i.e. failure indicates a kernel bug or broken firmware.
+        */
+       if (rdmsrl_safe(MSR_IA32_CR_PAT, &host_pat) ||
+           (host_pat & GENMASK(2, 0)) != 6) {
+               pr_err("kvm: host PAT[0] is not WB\n");
+               r = -EIO;
+               goto out;
+       }
+
        r = -ENOMEM;
 
        x86_emulator_cache = kvm_alloc_emulator_cache();