crypto: hisilicon/sec - enabling clock gating of the address prefetch module

Change the value of clock gating register to 0x7fff to enable
clock gating of the address prefetch module. When the device is
idle, the clock is turned off to save power.

Signed-off-by: Weili Qian <qianweili@huawei.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

diff --git a/drivers/crypto/hisilicon/sec2/sec_main.c b/drivers/crypto/hisilicon/sec2/sec_main.c
index 3705412bac5f19a1cf11cbbffa3a8b2efa647257..6eb8a16ba0a70ffa1f43db0a25bfc64fd9c66a44 100644 (file)
--- a/drivers/crypto/hisilicon/sec2/sec_main.c
+++ b/drivers/crypto/hisilicon/sec2/sec_main.c
@@ -55,7 +55,7 @@
 #define SEC_CONTROL_REG                0x301200
 #define SEC_DYNAMIC_GATE_REG           0x30121c
 #define SEC_CORE_AUTO_GATE             0x30212c
-#define SEC_DYNAMIC_GATE_EN            0x7bff
+#define SEC_DYNAMIC_GATE_EN            0x7fff
 #define SEC_CORE_AUTO_GATE_EN          GENMASK(3, 0)
 #define SEC_CLK_GATE_ENABLE            BIT(3)
 #define SEC_CLK_GATE_DISABLE           (~BIT(3))