drm/i915: pass dev_priv explicitly to CURCNTR

Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the CURCNTR register macro.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/06bc681558c86f351ae596e9600133bb10ae4bdd.1715774156.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>

diff --git a/drivers/gpu/drm/i915/display/intel_cursor.c b/drivers/gpu/drm/i915/display/intel_cursor.c
index 3ecab15d14310b3276e08f7c2eb4094e8ddac26e..31cb614b6ba8cf577a672c8d686857e5d697cd83 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_cursor.c
+++ b/drivers/gpu/drm/i915/display/intel_cursor.c
@@ -295,11 +295,11 @@ static void i845_cursor_update_arm(struct intel_plane *plane,
        if (plane->cursor.base != base ||
            plane->cursor.size != size ||
            plane->cursor.cntl != cntl) {
-               intel_de_write_fw(dev_priv, CURCNTR(PIPE_A), 0);
+               intel_de_write_fw(dev_priv, CURCNTR(dev_priv, PIPE_A), 0);
                intel_de_write_fw(dev_priv, CURBASE(PIPE_A), base);
                intel_de_write_fw(dev_priv, CURSIZE(PIPE_A), size);
                intel_de_write_fw(dev_priv, CURPOS(PIPE_A), pos);
-               intel_de_write_fw(dev_priv, CURCNTR(PIPE_A), cntl);
+               intel_de_write_fw(dev_priv, CURCNTR(dev_priv, PIPE_A), cntl);
 
                plane->cursor.base = base;
                plane->cursor.size = size;
@@ -328,7 +328,7 @@ static bool i845_cursor_get_hw_state(struct intel_plane *plane,
        if (!wakeref)
                return false;
 
-       ret = intel_de_read(dev_priv, CURCNTR(PIPE_A)) & CURSOR_ENABLE;
+       ret = intel_de_read(dev_priv, CURCNTR(dev_priv, PIPE_A)) & CURSOR_ENABLE;
 
        *pipe = PIPE_A;
 
@@ -646,7 +646,7 @@ static void i9xx_cursor_update_arm(struct intel_plane *plane,
                if (HAS_CUR_FBC(dev_priv))
                        intel_de_write_fw(dev_priv, CUR_FBC_CTL(pipe),
                                          fbc_ctl);
-               intel_de_write_fw(dev_priv, CURCNTR(pipe), cntl);
+               intel_de_write_fw(dev_priv, CURCNTR(dev_priv, pipe), cntl);
                intel_de_write_fw(dev_priv, CURPOS(pipe), pos);
                intel_de_write_fw(dev_priv, CURBASE(pipe), base);
 
@@ -684,7 +684,7 @@ static bool i9xx_cursor_get_hw_state(struct intel_plane *plane,
        if (!wakeref)
                return false;
 
-       val = intel_de_read(dev_priv, CURCNTR(plane->pipe));
+       val = intel_de_read(dev_priv, CURCNTR(dev_priv, plane->pipe));
 
        ret = val & MCURSOR_MODE_MASK;
 

diff --git a/drivers/gpu/drm/i915/display/intel_cursor_regs.h b/drivers/gpu/drm/i915/display/intel_cursor_regs.h
index a478ef5787c5605e7791ca19c7a01f03d9303544..5f522a4ecc2e557cb0690dd54e7c530704d422af 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_cursor_regs.h
+++ b/drivers/gpu/drm/i915/display/intel_cursor_regs.h
@@ -66,7 +66,7 @@
 #define _CURBBASE_IVB          0x71084
 #define _CURBPOS_IVB           0x71088
 
-#define CURCNTR(pipe) _MMIO_CURSOR2(dev_priv, pipe, _CURACNTR)
+#define CURCNTR(dev_priv, pipe) _MMIO_CURSOR2(dev_priv, pipe, _CURACNTR)
 #define CURBASE(pipe) _MMIO_CURSOR2(dev_priv, pipe, _CURABASE)
 #define CURPOS(pipe) _MMIO_CURSOR2(dev_priv, pipe, _CURAPOS)
 #define CURPOS_ERLY_TPT(pipe) _MMIO_CURSOR2(dev_priv, pipe, _CURAPOS_ERLY_TPT)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index e29073b90860d5b5b1b7149851b3a81c12a25d5c..cce1420fb5417f10fdce9ccad158c6da45293b8b 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -8238,9 +8238,9 @@ void i830_disable_pipe(struct drm_i915_private *dev_priv, enum pipe pipe)
        drm_WARN_ON(&dev_priv->drm,
                    intel_de_read(dev_priv, DSPCNTR(PLANE_C)) & DISP_ENABLE);
        drm_WARN_ON(&dev_priv->drm,
-                   intel_de_read(dev_priv, CURCNTR(PIPE_A)) & MCURSOR_MODE_MASK);
+                   intel_de_read(dev_priv, CURCNTR(dev_priv, PIPE_A)) & MCURSOR_MODE_MASK);
        drm_WARN_ON(&dev_priv->drm,
-                   intel_de_read(dev_priv, CURCNTR(PIPE_B)) & MCURSOR_MODE_MASK);
+                   intel_de_read(dev_priv, CURCNTR(dev_priv, PIPE_B)) & MCURSOR_MODE_MASK);
 
        intel_de_write(dev_priv, TRANSCONF(pipe), 0);
        intel_de_posting_read(dev_priv, TRANSCONF(pipe));

diff --git a/drivers/gpu/drm/i915/gvt/display.c b/drivers/gpu/drm/i915/gvt/display.c
index 527e0bb2b15ed345484d6efec8b4c3b92e0f952f..73ea8be0f80b84eeb792b6a91b8203ee6891f776 100644 (file)
--- a/drivers/gpu/drm/i915/gvt/display.c
+++ b/drivers/gpu/drm/i915/gvt/display.c
@@ -194,8 +194,8 @@ static void emulate_monitor_status_change(struct intel_vgpu *vgpu)
                                ~(TRANSCONF_ENABLE | TRANSCONF_STATE_ENABLE);
                        vgpu_vreg_t(vgpu, DSPCNTR(pipe)) &= ~DISP_ENABLE;
                        vgpu_vreg_t(vgpu, SPRCTL(pipe)) &= ~SPRITE_ENABLE;
-                       vgpu_vreg_t(vgpu, CURCNTR(pipe)) &= ~MCURSOR_MODE_MASK;
-                       vgpu_vreg_t(vgpu, CURCNTR(pipe)) |= MCURSOR_MODE_DISABLE;
+                       vgpu_vreg_t(vgpu, CURCNTR(dev_priv, pipe)) &= ~MCURSOR_MODE_MASK;
+                       vgpu_vreg_t(vgpu, CURCNTR(dev_priv, pipe)) |= MCURSOR_MODE_DISABLE;
                }
 
                for (trans = TRANSCODER_A; trans <= TRANSCODER_EDP; trans++) {
@@ -505,8 +505,8 @@ static void emulate_monitor_status_change(struct intel_vgpu *vgpu)
        for_each_pipe(dev_priv, pipe) {
                vgpu_vreg_t(vgpu, DSPCNTR(pipe)) &= ~DISP_ENABLE;
                vgpu_vreg_t(vgpu, SPRCTL(pipe)) &= ~SPRITE_ENABLE;
-               vgpu_vreg_t(vgpu, CURCNTR(pipe)) &= ~MCURSOR_MODE_MASK;
-               vgpu_vreg_t(vgpu, CURCNTR(pipe)) |= MCURSOR_MODE_DISABLE;
+               vgpu_vreg_t(vgpu, CURCNTR(dev_priv, pipe)) &= ~MCURSOR_MODE_MASK;
+               vgpu_vreg_t(vgpu, CURCNTR(dev_priv, pipe)) |= MCURSOR_MODE_DISABLE;
        }
 
        vgpu_vreg_t(vgpu, TRANSCONF(TRANSCODER_A)) |= TRANSCONF_ENABLE;

diff --git a/drivers/gpu/drm/i915/gvt/fb_decoder.c b/drivers/gpu/drm/i915/gvt/fb_decoder.c
index ac3ec9d1ef5f13372cae272635ee47e507549545..6e226ea1afa20cdaf74ac7e02f85035ac9ce675e 100644 (file)
--- a/drivers/gpu/drm/i915/gvt/fb_decoder.c
+++ b/drivers/gpu/drm/i915/gvt/fb_decoder.c
@@ -347,7 +347,7 @@ int intel_vgpu_decode_cursor_plane(struct intel_vgpu *vgpu,
        if (pipe >= I915_MAX_PIPES)
                return -ENODEV;
 
-       val = vgpu_vreg_t(vgpu, CURCNTR(pipe));
+       val = vgpu_vreg_t(vgpu, CURCNTR(dev_priv, pipe));
        mode = val & MCURSOR_MODE_MASK;
        plane->enabled = (mode != MCURSOR_MODE_DISABLE);
        if (!plane->enabled)

diff --git a/drivers/gpu/drm/i915/intel_gvt_mmio_table.c b/drivers/gpu/drm/i915/intel_gvt_mmio_table.c
index 843bdb46d49ccaf5cc8328424ae1b1ea912be720..18deaf416b7e17a8e82e01a6f4283ed80b17ce25 100644 (file)
--- a/drivers/gpu/drm/i915/intel_gvt_mmio_table.c
+++ b/drivers/gpu/drm/i915/intel_gvt_mmio_table.c
@@ -145,9 +145,9 @@ static int iterate_generic_mmio(struct intel_gvt_mmio_table_iter *iter)
        MMIO_D(PIPE_FRMCOUNT_G4X(PIPE_B));
        MMIO_D(PIPE_FRMCOUNT_G4X(PIPE_C));
        MMIO_D(PIPE_FRMCOUNT_G4X(_PIPE_EDP));
-       MMIO_D(CURCNTR(PIPE_A));
-       MMIO_D(CURCNTR(PIPE_B));
-       MMIO_D(CURCNTR(PIPE_C));
+       MMIO_D(CURCNTR(dev_priv, PIPE_A));
+       MMIO_D(CURCNTR(dev_priv, PIPE_B));
+       MMIO_D(CURCNTR(dev_priv, PIPE_C));
        MMIO_D(CURPOS(PIPE_A));
        MMIO_D(CURPOS(PIPE_B));
        MMIO_D(CURPOS(PIPE_C));