#define PA5_RG_U2_HS_100U_U3_EN BIT(11)
#define U3P_USBPHYACR6 0x018
+#define PA6_RG_U2_PRE_EMP GENMASK(31, 30)
+#define PA6_RG_U2_PRE_EMP_VAL(x) ((0x3 & (x)) << 30)
#define PA6_RG_U2_BC11_SW_EN BIT(23)
#define PA6_RG_U2_OTG_VBUSCMP_EN BIT(20)
#define PA6_RG_U2_DISCTH GENMASK(7, 4)
int eye_term;
int intr;
int discth;
+ int pre_emphasis;
bool bc12_en;
};
&instance->intr);
device_property_read_u32(dev, "mediatek,discth",
&instance->discth);
+ device_property_read_u32(dev, "mediatek,pre-emphasis",
+ &instance->pre_emphasis);
dev_dbg(dev, "bc12:%d, src:%d, vrt:%d, term:%d, intr:%d, disc:%d\n",
instance->bc12_en, instance->eye_src,
instance->eye_vrt, instance->eye_term,
instance->intr, instance->discth);
+ dev_dbg(dev, "pre-emp:%d\n", instance->pre_emphasis);
}
static void u2_phy_props_set(struct mtk_tphy *tphy,
if (instance->discth)
mtk_phy_update_bits(com + U3P_USBPHYACR6, PA6_RG_U2_DISCTH,
PA6_RG_U2_DISCTH_VAL(instance->discth));
+
+ if (instance->pre_emphasis)
+ mtk_phy_update_bits(com + U3P_USBPHYACR6, PA6_RG_U2_PRE_EMP,
+ PA6_RG_U2_PRE_EMP_VAL(instance->pre_emphasis));
}
/* type switch for usb3/pcie/sgmii/sata */