net/mlx5: Remove from FPGA IFC file not-needed definitions
authorLeon Romanovsky <leonro@nvidia.com>
Wed, 7 Sep 2022 23:36:32 +0000 (16:36 -0700)
committerSaeed Mahameed <saeedm@nvidia.com>
Tue, 27 Sep 2022 19:50:27 +0000 (12:50 -0700)
Move IP layout bits definitions to be close to the place that actually
uses it, together with removal extra defines that not in-use.

Reviewed-by: Raed Salem <raeds@nvidia.com>
Signed-off-by: Leon Romanovsky <leonro@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
include/linux/mlx5/mlx5_ifc.h
include/linux/mlx5/mlx5_ifc_fpga.h

index b7f4e93df0f22ca64951c782e4664b6585d4a4aa..c25f2ce757342ac455ee2ef1b59e2dd4f52f8cc5 100644 (file)
@@ -478,6 +478,22 @@ struct mlx5_ifc_odp_per_transport_service_cap_bits {
        u8         reserved_at_6[0x1a];
 };
 
+struct mlx5_ifc_ipv4_layout_bits {
+       u8         reserved_at_0[0x60];
+
+       u8         ipv4[0x20];
+};
+
+struct mlx5_ifc_ipv6_layout_bits {
+       u8         ipv6[16][0x8];
+};
+
+union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits {
+       struct mlx5_ifc_ipv6_layout_bits ipv6_layout;
+       struct mlx5_ifc_ipv4_layout_bits ipv4_layout;
+       u8         reserved_at_0[0x80];
+};
+
 struct mlx5_ifc_fte_match_set_lyr_2_4_bits {
        u8         smac_47_16[0x20];
 
index 45c7c0d6763562cddbf57612a384110f1c6682c9..0596472923ad8717ee5d0594102d53e22f62c209 100644 (file)
 #ifndef MLX5_IFC_FPGA_H
 #define MLX5_IFC_FPGA_H
 
-struct mlx5_ifc_ipv4_layout_bits {
-       u8         reserved_at_0[0x60];
-
-       u8         ipv4[0x20];
-};
-
-struct mlx5_ifc_ipv6_layout_bits {
-       u8         ipv6[16][0x8];
-};
-
-union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits {
-       struct mlx5_ifc_ipv6_layout_bits ipv6_layout;
-       struct mlx5_ifc_ipv4_layout_bits ipv4_layout;
-       u8         reserved_at_0[0x80];
-};
-
-enum {
-       MLX5_FPGA_CAP_SANDBOX_VENDOR_ID_MLNX = 0x2c9,
-};
-
-enum {
-       MLX5_FPGA_CAP_SANDBOX_PRODUCT_ID_IPSEC    = 0x2,
-};
-
 struct mlx5_ifc_fpga_shell_caps_bits {
        u8         max_num_qps[0x10];
        u8         reserved_at_10[0x8];