arm64: dts: qcom: sc8180x: switch UFS QMP PHY to new style of bindings

Change the UFS QMP PHY to use newer style of QMP PHY bindings (single
resource region, no per-PHY subnodes).

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230731111158.3998107-1-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/sc8180x.dtsi b/arch/arm64/boot/dts/qcom/sc8180x.dtsi
index b883f1ba6f03634227766528348b55d34316935b..8fa296142eaba97c050746489a6ce4fdcd44cbcd 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sc8180x.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc8180x.dtsi
@@ -2118,7 +2118,7 @@
                                     "jedec,ufs-2.0";
                        reg = <0 0x01d84000 0 0x2500>;
                        interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
-                       phys = <&ufs_mem_phy_lanes>;
+                       phys = <&ufs_mem_phy>;
                        phy-names = "ufsphy";
                        lanes-per-direction = <2>;
                        #reset-cells = <1>;
@@ -2157,10 +2157,8 @@
 
                ufs_mem_phy: phy-wrapper@1d87000 {
                        compatible = "qcom,sc8180x-qmp-ufs-phy";
-                       reg = <0 0x01d87000 0 0x1c0>;
-                       #address-cells = <2>;
-                       #size-cells = <2>;
-                       ranges;
+                       reg = <0 0x01d87000 0 0x1000>;
+
                        clocks = <&rpmhcc RPMH_CXO_CLK>,
                                 <&gcc GCC_UFS_PHY_PHY_AUX_CLK>;
                        clock-names = "ref",
@@ -2168,16 +2166,10 @@
 
                        resets = <&ufs_mem_hc 0>;
                        reset-names = "ufsphy";
-                       status = "disabled";
 
-                       ufs_mem_phy_lanes: phy@1d87400 {
-                               reg = <0 0x01d87400 0 0x108>,
-                                     <0 0x01d87600 0 0x1e0>,
-                                     <0 0x01d87c00 0 0x1dc>,
-                                     <0 0x01d87800 0 0x108>,
-                                     <0 0x01d87a00 0 0x1e0>;
-                               #phy-cells = <0>;
-                       };
+                       #phy-cells = <0>;
+
+                       status = "disabled";
                };
 
                ipa_virt: interconnect@1e00000 {