LoongArch: KVM: Add address alignment check for IOCSR emulation
authorBibo Mao <maobibo@loongson.cn>
Fri, 27 Jun 2025 10:27:44 +0000 (18:27 +0800)
committerHuacai Chen <chenhuacai@loongson.cn>
Fri, 27 Jun 2025 10:27:44 +0000 (18:27 +0800)
IOCSR instruction supports 1/2/4/8 bytes access, the address should be
naturally aligned with its access size. Here address alignment check is
added in the EIOINTC kernel emulation.

Cc: stable@vger.kernel.org
Fixes: 3956a52bc05b ("LoongArch: KVM: Add EIOINTC read and write functions")
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
arch/loongarch/kvm/intc/eiointc.c

index 9c47456b805c9e6157e68649d00b3f558854499b..236cbf97916712d4115affb23aaf0c2a97198d30 100644 (file)
@@ -305,6 +305,11 @@ static int kvm_eiointc_read(struct kvm_vcpu *vcpu,
                return -EINVAL;
        }
 
+       if (addr & (len - 1)) {
+               kvm_err("%s: eiointc not aligned addr %llx len %d\n", __func__, addr, len);
+               return -EINVAL;
+       }
+
        vcpu->kvm->stat.eiointc_read_exits++;
        spin_lock_irqsave(&eiointc->lock, flags);
        switch (len) {
@@ -676,6 +681,11 @@ static int kvm_eiointc_write(struct kvm_vcpu *vcpu,
                return -EINVAL;
        }
 
+       if (addr & (len - 1)) {
+               kvm_err("%s: eiointc not aligned addr %llx len %d\n", __func__, addr, len);
+               return -EINVAL;
+       }
+
        vcpu->kvm->stat.eiointc_write_exits++;
        spin_lock_irqsave(&eiointc->lock, flags);
        switch (len) {