drm/xe: Change GuC interrupt data

Both GUC_HOST_INTERRUPT and MED_GUC_HOST_INTERRUPT can pass
additional payload data to the GuC but this capability is not
used by the firmware yet.

Stop using value mandated by legacy GuC interrupt register and
use default notify value (zero) instead.

Bspec: 49813, 63363
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c
index 92d732690252679ea91fffcd4c8b799c5d83d774..71f18b32d09b6206debc729a1213f50e141082cd 100644 (file)
--- a/drivers/gpu/drm/xe/xe_guc.c
+++ b/drivers/gpu/drm/xe/xe_guc.c
@@ -598,8 +598,14 @@ int xe_guc_suspend(struct xe_guc *guc)
 void xe_guc_notify(struct xe_guc *guc)
 {
        struct xe_gt *gt = guc_to_gt(guc);
+       const u32 default_notify_data = 0;
 
-       xe_mmio_write32(gt, guc->notify_reg, GUC_SEND_TRIGGER);
+       /*
+        * Both GUC_HOST_INTERRUPT and MED_GUC_HOST_INTERRUPT can pass
+        * additional payload data to the GuC but this capability is not
+        * used by the firmware yet. Use default value in the meantime.
+        */
+       xe_mmio_write32(gt, guc->notify_reg, default_notify_data);
 }
 
 int xe_guc_auth_huc(struct xe_guc *guc, u32 rsa_addr)