[MIPS] SB1250: Fix bugs/warnings by creative use of volatile.
authorRalf Baechle <ralf@linux-mips.org>
Sat, 24 Mar 2007 14:26:13 +0000 (14:26 +0000)
committerRalf Baechle <ralf@linux-mips.org>
Sat, 24 Mar 2007 17:01:50 +0000 (17:01 +0000)
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/mm/pg-sb1.c
arch/mips/pci/pci-bcm1480.c
arch/mips/pci/pci-sb1250.c
arch/mips/sibyte/bcm1480/smp.c
arch/mips/sibyte/swarm/setup.c
drivers/net/sb1250-mac.c
include/asm-mips/sibyte/sb1250.h

index fc3c7878fb459eba0d8e45b15751313435d8a16d..adb37d0a30ea8d28ef90a8743844fc220dac396c 100644 (file)
@@ -218,8 +218,7 @@ void sb1_dma_init(void)
        for (i = 0; i < DM_NUM_CHANNELS; i++) {
                const u64 base_val = CPHYSADDR(&page_descr[i]) |
                                     V_DM_DSCR_BASE_RINGSZ(1);
-               volatile void *base_reg =
-                       IOADDR(A_DM_REGISTER(i, R_DM_DSCR_BASE));
+               void *base_reg = IOADDR(A_DM_REGISTER(i, R_DM_DSCR_BASE));
 
                __raw_writeq(base_val, base_reg);
                __raw_writeq(base_val | M_DM_DSCR_BASE_RESET, base_reg);
index f6774f54cd3c61f5aa42e9c184d2d390780652e3..d7b9e1349f6d6302582af3b99731f8a20cb09a7e 100644 (file)
@@ -216,7 +216,7 @@ static int __init bcm1480_pcibios_init(void)
        /*
         * See if the PCI bus has been configured by the firmware.
         */
-       reg = *((volatile uint64_t *) IOADDR(A_SCD_SYSTEM_CFG));
+       reg = __raw_readq(IOADDR(A_SCD_SYSTEM_CFG));
        if (!(reg & M_BCM1480_SYS_PCI_HOST)) {
                bcm1480_bus_status |= PCI_DEVICE_MODE;
        } else {
index 80f5e8c4bcd47e203822d9dc3df74c7ceb3b00a1..75c1246ced5f26a37c391fa93f8ef7a4ec554dbe 100644 (file)
@@ -228,7 +228,7 @@ static int __init sb1250_pcibios_init(void)
        /*
         * See if the PCI bus has been configured by the firmware.
         */
-       reg = *((volatile uint64_t *) IOADDR(A_SCD_SYSTEM_CFG));
+       reg = __raw_readq(IOADDR(A_SCD_SYSTEM_CFG));
        if (!(reg & M_SYS_PCI_HOST)) {
                sb1250_bus_status |= PCI_DEVICE_MODE;
        } else {
index bf328277c775e12f649ebeeeeb4af7f10710e493..6eac36d1b8c893fcb1c56d16d1ba0808ce19e90d 100644 (file)
@@ -34,21 +34,21 @@ extern void smp_call_function_interrupt(void);
  * independent of board/firmware
  */
 
-static volatile void *mailbox_0_set_regs[] = {
+static void *mailbox_0_set_regs[] = {
        IOADDR(A_BCM1480_IMR_CPU0_BASE + R_BCM1480_IMR_MAILBOX_0_SET_CPU),
        IOADDR(A_BCM1480_IMR_CPU1_BASE + R_BCM1480_IMR_MAILBOX_0_SET_CPU),
        IOADDR(A_BCM1480_IMR_CPU2_BASE + R_BCM1480_IMR_MAILBOX_0_SET_CPU),
        IOADDR(A_BCM1480_IMR_CPU3_BASE + R_BCM1480_IMR_MAILBOX_0_SET_CPU),
 };
 
-static volatile void *mailbox_0_clear_regs[] = {
+static void *mailbox_0_clear_regs[] = {
        IOADDR(A_BCM1480_IMR_CPU0_BASE + R_BCM1480_IMR_MAILBOX_0_CLR_CPU),
        IOADDR(A_BCM1480_IMR_CPU1_BASE + R_BCM1480_IMR_MAILBOX_0_CLR_CPU),
        IOADDR(A_BCM1480_IMR_CPU2_BASE + R_BCM1480_IMR_MAILBOX_0_CLR_CPU),
        IOADDR(A_BCM1480_IMR_CPU3_BASE + R_BCM1480_IMR_MAILBOX_0_CLR_CPU),
 };
 
-static volatile void *mailbox_0_regs[] = {
+static void *mailbox_0_regs[] = {
        IOADDR(A_BCM1480_IMR_CPU0_BASE + R_BCM1480_IMR_MAILBOX_0_CPU),
        IOADDR(A_BCM1480_IMR_CPU1_BASE + R_BCM1480_IMR_MAILBOX_0_CPU),
        IOADDR(A_BCM1480_IMR_CPU2_BASE + R_BCM1480_IMR_MAILBOX_0_CPU),
index defa1f1452adb6d3c6a93134ddfafad908761218..83572d8f3e1455ef414b0ebda64831f4915cb4bf 100644 (file)
@@ -169,17 +169,19 @@ void __init plat_mem_setup(void)
 #define LEDS_PHYS MLEDS_PHYS
 #endif
 
-#define setled(index, c) \
-  ((unsigned char *)(IOADDR(LEDS_PHYS)+0x20))[(3-(index))<<3] = (c)
 void setleds(char *str)
 {
+       void *reg;
        int i;
+
        for (i = 0; i < 4; i++) {
-               if (!str[i]) {
-                       setled(i, ' ');
-               } else {
-                       setled(i, str[i]);
-               }
+               reg = IOADDR(LEDS_PHYS) + 0x20 + ((3 - i) << 3);
+
+               if (!str[i])
+                       writeb(' ', reg);
+               else
+                       writeb(str[i], reg);
        }
 }
-#endif
+
+#endif /* LEDS_PHYS */
index 1eae16b72b4b71122c47284d9a3902af2c63485e..103c3174ab540eed89c938523402ebee713eb72c 100644 (file)
@@ -243,7 +243,7 @@ struct sbmac_softc {
         * Controller-specific things
         */
 
-       volatile void __iomem *sbm_base;          /* MAC's base address */
+       void __iomem            *sbm_base;          /* MAC's base address */
        sbmac_state_t    sbm_state;         /* current state */
 
        volatile void __iomem   *sbm_macenable; /* MAC Enable Register */
index dfb29e13bce0c5d162a297c851538eaef2603049..494aa65dcfbd670d037e3e092aa6a14cd567d481 100644 (file)
@@ -67,6 +67,6 @@ extern void bcm1480_smp_finish(void);
 
 #endif
 
-#define IOADDR(a) ((volatile void __iomem *)(IO_BASE + (a)))
+#define IOADDR(a) ((void __iomem *)(IO_BASE + (a)))
 
 #endif