xtensa: replace variant/core.h with asm/core.h
authorMax Filippov <jcmvbkbc@gmail.com>
Wed, 2 Jan 2019 03:41:55 +0000 (19:41 -0800)
committerMax Filippov <jcmvbkbc@gmail.com>
Tue, 7 May 2019 00:48:55 +0000 (17:48 -0700)
Introduce the header arch/xtensa/include/asm/core.h that provides
definitions for XCHAL macros missing in older xtensa releases. Use this
header instead of variant/core.h

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
21 files changed:
arch/xtensa/boot/boot-redboot/bootstrap.S
arch/xtensa/include/asm/asmmacro.h
arch/xtensa/include/asm/cache.h
arch/xtensa/include/asm/checksum.h
arch/xtensa/include/asm/coprocessor.h
arch/xtensa/include/asm/core.h [new file with mode: 0644]
arch/xtensa/include/asm/initialize_mmu.h
arch/xtensa/include/asm/irq.h
arch/xtensa/include/asm/processor.h
arch/xtensa/include/asm/ptrace.h
arch/xtensa/include/asm/vectors.h
arch/xtensa/kernel/hw_breakpoint.c
arch/xtensa/kernel/vmlinux.lds.S
arch/xtensa/lib/checksum.S
arch/xtensa/lib/memcopy.S
arch/xtensa/lib/memset.S
arch/xtensa/lib/strncpy_user.S
arch/xtensa/lib/strnlen_user.S
arch/xtensa/lib/usercopy.S
arch/xtensa/platforms/xt2000/include/platform/hardware.h
arch/xtensa/platforms/xt2000/include/platform/serial.h

index bbf3b4b080cdaf8eceee319382b58666fe1e8601..48ba5a232d948792d95aa8bc3fe3aca5e4c250ec 100644 (file)
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: GPL-2.0 */
-#include <variant/core.h>
+#include <asm/core.h>
 #include <asm/regs.h>
 #include <asm/asmmacro.h>
 #include <asm/cacheasm.h>
index 7f2ae5872151de9452c1bf837297f81280eda9a2..8308a9c3abb2f085f5df117bd40efed079ac1f60 100644 (file)
@@ -11,7 +11,7 @@
 #ifndef _XTENSA_ASMMACRO_H
 #define _XTENSA_ASMMACRO_H
 
-#include <variant/core.h>
+#include <asm/core.h>
 
 /*
  * Some little helpers for loops. Use zero-overhead-loops
index d2fd932fdb4dd43c2266d8930cc74887c0cf6e4b..b21fd133ff62092a9e7bd171a5831eede1d007d0 100644 (file)
@@ -11,7 +11,7 @@
 #ifndef _XTENSA_CACHE_H
 #define _XTENSA_CACHE_H
 
-#include <variant/core.h>
+#include <asm/core.h>
 
 #define L1_CACHE_SHIFT XCHAL_DCACHE_LINEWIDTH
 #define L1_CACHE_BYTES XCHAL_DCACHE_LINESIZE
index f302ef57973a45e8a9dccf82a8329158f48172a3..8b687176ad7245cfef1e9b06dd0344a0b72eafb0 100644 (file)
@@ -13,7 +13,7 @@
 
 #include <linux/in6.h>
 #include <linux/uaccess.h>
-#include <variant/core.h>
+#include <asm/core.h>
 
 /*
  * computes the checksum of a memory block at buff, length len,
index 6712929a27c99a69e66c308f3aaefe033fdc1bc3..0fbe2a740b8d6ff494e8f8dbe896f0f0a67e85b0 100644 (file)
@@ -12,8 +12,8 @@
 #ifndef _XTENSA_COPROCESSOR_H
 #define _XTENSA_COPROCESSOR_H
 
-#include <variant/core.h>
 #include <variant/tie.h>
+#include <asm/core.h>
 #include <asm/types.h>
 
 #ifdef __ASSEMBLY__
diff --git a/arch/xtensa/include/asm/core.h b/arch/xtensa/include/asm/core.h
new file mode 100644 (file)
index 0000000..b1f5751
--- /dev/null
@@ -0,0 +1,13 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/* Copyright (C) 2019 Cadence Design Systems Inc. */
+
+#ifndef _ASM_XTENSA_CORE_H
+#define _ASM_XTENSA_CORE_H
+
+#include <variant/core.h>
+
+#ifndef XCHAL_SPANNING_WAY
+#define XCHAL_SPANNING_WAY 0
+#endif
+
+#endif
index 10e9852b2fb474d18ba8e5401592792fefe3504f..d719785e54f70256ad8ab5b005ef8524af2a4899 100644 (file)
 #define CA_WRITEBACK   (0x4)
 #endif
 
-#ifndef XCHAL_SPANNING_WAY
-#define XCHAL_SPANNING_WAY 0
-#endif
-
 #ifdef __ASSEMBLY__
 
 #define XTENSA_HWVERSION_RC_2009_0 230000
index 6c6ed23e0c79c51875710e29a7e59ce59fe2ef7b..0f71a51dab2524647599092dc28bf4782a5ee541 100644 (file)
@@ -12,7 +12,7 @@
 #define _XTENSA_IRQ_H
 
 #include <linux/init.h>
-#include <variant/core.h>
+#include <asm/core.h>
 
 #ifdef CONFIG_PLATFORM_NR_IRQS
 # define PLATFORM_NR_IRQS CONFIG_PLATFORM_NR_IRQS
index 0c14018d1c2601a63a92b2f29be1270d9919220c..19f6b54e358b1d53594896bb6c2f29113ec0b849 100644 (file)
@@ -10,7 +10,7 @@
 #ifndef _XTENSA_PROCESSOR_H
 #define _XTENSA_PROCESSOR_H
 
-#include <variant/core.h>
+#include <asm/core.h>
 
 #include <linux/compiler.h>
 #include <linux/stringify.h>
index 62a58d2567e94459d0cdbf4c5f9f95236b4d7858..b109416dc07e8047a3963f0f1647ca229a755b86 100644 (file)
@@ -80,7 +80,7 @@ struct pt_regs {
        unsigned long areg[16];
 };
 
-#include <variant/core.h>
+#include <asm/core.h>
 
 # define arch_has_single_step()        (1)
 # define task_pt_regs(tsk) ((struct pt_regs*) \
index 7111280c8842287fcc6a177d7c116b837c8974ec..79fe3007919eb2f9039548807306444e5a923c37 100644 (file)
@@ -18,7 +18,7 @@
 #ifndef _XTENSA_VECTORS_H
 #define _XTENSA_VECTORS_H
 
-#include <variant/core.h>
+#include <asm/core.h>
 #include <asm/kmem_layout.h>
 
 #if XCHAL_HAVE_PTP_MMU
index 4f20416061fbb0d25ac7750c5ea1dec02fcca94d..285fb2942b06593a585e154f32fa67d920afc295 100644 (file)
@@ -12,7 +12,7 @@
 #include <linux/log2.h>
 #include <linux/percpu.h>
 #include <linux/perf_event.h>
-#include <variant/core.h>
+#include <asm/core.h>
 
 /* Breakpoint currently in use for each IBREAKA. */
 static DEFINE_PER_CPU(struct perf_event *, bp_on_reg[XCHAL_NUM_IBREAK]);
index b80a430453b1cb7d76b8598db8eb0b06f039df8d..943f10639a93321fea7c28009567503cb370a0bd 100644 (file)
@@ -18,8 +18,8 @@
 #include <asm/page.h>
 #include <asm/thread_info.h>
 
+#include <asm/core.h>
 #include <asm/vectors.h>
-#include <variant/core.h>
 
 OUTPUT_ARCH(xtensa)
 ENTRY(_start)
index 528fe0dd9339f99b318bfd62615193f98ef94536..d82c20c1fb7a525f0919c8ce0208beb18633dc28 100644 (file)
@@ -16,8 +16,8 @@
 
 #include <linux/errno.h>
 #include <linux/linkage.h>
-#include <variant/core.h>
 #include <asm/asmmacro.h>
+#include <asm/core.h>
 
 /*
  * computes a partial checksum, e.g. for TCP/UDP fragments
index c0f6981719d62eea6c492fe5471a1fde815878f7..efecfd7ed8cc8731f674307def47c417ac7ce077 100644 (file)
@@ -10,8 +10,8 @@
  */
 
 #include <linux/linkage.h>
-#include <variant/core.h>
 #include <asm/asmmacro.h>
+#include <asm/core.h>
 
 /*
  * void *memcpy(void *dst, const void *src, size_t len);
index 276747dec300ac51d70799f43351856ba8d7c94c..8632eacbdc8021a903a10d17d58a9dbc2de94439 100644 (file)
@@ -12,8 +12,8 @@
  */
 
 #include <linux/linkage.h>
-#include <variant/core.h>
 #include <asm/asmmacro.h>
+#include <asm/core.h>
 
 /*
  * void *memset(void *dst, int c, size_t length)
index 5fce16b67dca82a66ef4a46828fbe9da3bf8858e..c4c6c8578d5902ddf25a85e51699a4f4a67eda49 100644 (file)
@@ -13,8 +13,8 @@
 
 #include <linux/errno.h>
 #include <linux/linkage.h>
-#include <variant/core.h>
 #include <asm/asmmacro.h>
+#include <asm/core.h>
 
 /*
  * char *__strncpy_user(char *dst, const char *src, size_t len)
index 0b956ce7f38623077038f13dc123a5c2f2b5d29b..1f2ca2bb2ab3a096885ab131f5397f43211dc170 100644 (file)
@@ -12,8 +12,8 @@
  */
 
 #include <linux/linkage.h>
-#include <variant/core.h>
 #include <asm/asmmacro.h>
+#include <asm/core.h>
 
 /*
  * size_t __strnlen_user(const char *s, size_t len)
index 64ab1971324f3a812eb2d3b05f53b9c060c12573..228607e30bc25320f15b53f4e30a2950e54a9ad7 100644 (file)
@@ -54,8 +54,8 @@
  */
 
 #include <linux/linkage.h>
-#include <variant/core.h>
 #include <asm/asmmacro.h>
+#include <asm/core.h>
 
        .text
 ENTRY(__xtensa_copy_user)
index 8e5e0d6a81ec7868d0fa7bcb10ca5b37132048fa..9f213f5733306bf8475d8e38a678e39d5d604bad 100644 (file)
@@ -15,7 +15,7 @@
 #ifndef _XTENSA_XT2000_HARDWARE_H
 #define _XTENSA_XT2000_HARDWARE_H
 
-#include <variant/core.h>
+#include <asm/core.h>
 
 /*
  * On-board components.
index 7226cf732b4797c4f7df20ff88f9c11741b62cc4..cde804827626faa886f8b113740da026eeef7e0b 100644 (file)
@@ -11,7 +11,7 @@
 #ifndef _XTENSA_XT2000_SERIAL_H
 #define _XTENSA_XT2000_SERIAL_H
 
-#include <variant/core.h>
+#include <asm/core.h>
 #include <asm/io.h>
 
 /*  National-Semi PC16552D DUART:  */