ASoC: fsl_sai: Fix channel swap issue on i.MX8MP
authorShengjiu Wang <shengjiu.wang@nxp.com>
Tue, 19 Dec 2023 02:30:57 +0000 (10:30 +0800)
committerMark Brown <broonie@kernel.org>
Tue, 19 Dec 2023 13:23:39 +0000 (13:23 +0000)
When flag mclk_with_tere and mclk_direction_output enabled,
The SAI transmitter or receiver will be enabled in very early
stage, that if FSL_SAI_xMR is set by previous case,
for example previous case is one channel, current case is
two channels, then current case started with wrong xMR in
the beginning, then channel swap happen.

The patch is to clear xMR in hw_free() to avoid such
channel swap issue.

Fixes: 3e4a82612998 ("ASoC: fsl_sai: MCLK bind with TX/RX enable bit")
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
Link: https://msgid.link/r/1702953057-4499-1-git-send-email-shengjiu.wang@nxp.com
Signed-off-by: Mark Brown <broonie@kernel.org>
sound/soc/fsl/fsl_sai.c

index 32bbe5056a63520ec953d3a7425129f18234c1a5..546bd4e333b5fbc87569c83fd57073d9caea8bcc 100644 (file)
@@ -714,6 +714,9 @@ static int fsl_sai_hw_free(struct snd_pcm_substream *substream,
        bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
        unsigned int ofs = sai->soc_data->reg_offset;
 
+       /* Clear xMR to avoid channel swap with mclk_with_tere enabled case */
+       regmap_write(sai->regmap, FSL_SAI_xMR(tx), 0);
+
        regmap_update_bits(sai->regmap, FSL_SAI_xCR3(tx, ofs),
                           FSL_SAI_CR3_TRCE_MASK, 0);