arm64: dts: ti: k3-j721e-main: Add crypto accelerator node

Add crypto accelarator node for supporting hardware crypto algorithms,
including SHA1, SHA256, SHA512, AES, 3DES, and AEAD suites.

[t-kristo@ti.com: Modifications based on introduction of yaml binding]

Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20200826082921.19143-3-t-kristo@ti.com

diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
index 12ceea9b3c9aef8da1ea4610ba3cd7083d9fd722..10f00d7a0c3b10ddc6040af474743f0761335576 100644 (file)
--- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
@@ -304,6 +304,29 @@
                };
        };
 
+       main_crypto: crypto@4e00000 {
+               compatible = "ti,j721e-sa2ul";
+               reg = <0x0 0x4e00000 0x0 0x1200>;
+               power-domains = <&k3_pds 264 TI_SCI_PD_EXCLUSIVE>;
+               #address-cells = <2>;
+               #size-cells = <2>;
+               ranges = <0x0 0x04e00000 0x00 0x04e00000 0x0 0x30000>;
+
+               status = "okay";
+
+               dmas = <&main_udmap 0xc000>, <&main_udmap 0x4000>,
+                               <&main_udmap 0x4001>;
+               dma-names = "tx", "rx1", "rx2";
+               dma-coherent;
+
+               rng: rng@4e10000 {
+                       compatible = "inside-secure,safexcel-eip76";
+                       reg = <0x0 0x4e10000 0x0 0x7d>;
+                       interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&k3_clks 264 1>;
+               };
+       };
+
        main_pmx0: pinmux@11c000 {
                compatible = "pinctrl-single";
                /* Proxy 0 addressing */