dmaengine: qcom_hidma: correct channel QOS register offset

A regression was found while testing QOS with different channels.
The QOS register offset is 0x700 rather than 0x300.

Signed-off-by: Sinan Kaya <okaya@codeaurora.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>

diff --git a/drivers/dma/qcom/hidma_mgmt.c b/drivers/dma/qcom/hidma_mgmt.c
index d51cd34c8267965227725e2adeb96156fc18daea..c45e244b2d9937aaf3a13b0a9cef1f44659675d5 100644 (file)
--- a/drivers/dma/qcom/hidma_mgmt.c
+++ b/drivers/dma/qcom/hidma_mgmt.c
@@ -28,7 +28,7 @@
 
 #include "hidma_mgmt.h"
 
-#define HIDMA_QOS_N_OFFSET             0x300
+#define HIDMA_QOS_N_OFFSET             0x700
 #define HIDMA_CFG_OFFSET               0x400
 #define HIDMA_MAX_BUS_REQ_LEN_OFFSET   0x41C
 #define HIDMA_MAX_XACTIONS_OFFSET      0x420