MIPS: Get rid of CAVIUM_OCTEON_DCACHE_PREFETCH_WAR

CAVIUM_OCTEON_DCACHE_PREFETCH_WAR is a check for Octeon model CN6XXXX.
By using the version check we can remove the define.

Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>

diff --git a/arch/mips/cavium-octeon/setup.c b/arch/mips/cavium-octeon/setup.c
index 4f34d92b52f9828f9cd5e5ba73bace306d8ff825..8a357cb068c2f6d5e40bf0b4b4b30db93c78b2aa 100644 (file)
--- a/arch/mips/cavium-octeon/setup.c
+++ b/arch/mips/cavium-octeon/setup.c
@@ -1126,7 +1126,7 @@ EXPORT_SYMBOL(prom_putchar);
 
 void __init prom_free_prom_memory(void)
 {
-       if (CAVIUM_OCTEON_DCACHE_PREFETCH_WAR) {
+       if (OCTEON_IS_MODEL(OCTEON_CN6XXX)) {
                /* Check for presence of Core-14449 fix.  */
                u32 insn;
                u32 *foo;

diff --git a/arch/mips/include/asm/mach-cavium-octeon/war.h b/arch/mips/include/asm/mach-cavium-octeon/war.h
index 616de70e697cd877da6860fb1e4f4bead07bbfcd..ba6df0a186e9f2bfcb4f3d5a628bb98cadc83c55 100644 (file)
--- a/arch/mips/include/asm/mach-cavium-octeon/war.h
+++ b/arch/mips/include/asm/mach-cavium-octeon/war.h
@@ -9,7 +9,4 @@
 #ifndef __ASM_MIPS_MACH_CAVIUM_OCTEON_WAR_H
 #define __ASM_MIPS_MACH_CAVIUM_OCTEON_WAR_H
 
-#define CAVIUM_OCTEON_DCACHE_PREFETCH_WAR      \
-       OCTEON_IS_MODEL(OCTEON_CN6XXX)
-
 #endif /* __ASM_MIPS_MACH_CAVIUM_OCTEON_WAR_H */

diff --git a/arch/mips/mm/uasm.c b/arch/mips/mm/uasm.c
index c56f129c9a4ba400e70a3be459b689f4fd103b25..81dd226d6b6bf02c4fab8f8d4b4fc93abe4495df 100644 (file)
--- a/arch/mips/mm/uasm.c
+++ b/arch/mips/mm/uasm.c
@@ -394,7 +394,7 @@ I_u2u1u3(_lddir)
 void uasm_i_pref(u32 **buf, unsigned int a, signed int b,
                            unsigned int c)
 {
-       if (CAVIUM_OCTEON_DCACHE_PREFETCH_WAR && a <= 24 && a != 5)
+       if (OCTEON_IS_MODEL(OCTEON_CN6XXX) && a <= 24 && a != 5)
                /*
                 * As per erratum Core-14449, replace prefetches 0-4,
                 * 6-24 with 'pref 28'.