arm64: dts: imx95: add usb3 related nodes

Add usb3 phy and controller nodes for imx95.

Signed-off-by: Xu Yang <xu.yang_2@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts/freescale/imx95.dtsi
index 6b8470cb3461a2e4917e0850bbd91f4a346f45aa..0b64a1df3c7a6de2bbda8afee70c36b188ac30ea 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx95.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx95.dtsi
@@ -1537,6 +1537,48 @@
                        };
                };
 
+               usb3: usb@4c010010 {
+                       compatible = "fsl,imx95-dwc3", "fsl,imx8mp-dwc3";
+                       reg = <0x0 0x4c010010 0x0 0x04>,
+                             <0x0 0x4c1f0000 0x0 0x20>;
+                       clocks = <&scmi_clk IMX95_CLK_HSIO>,
+                                <&scmi_clk IMX95_CLK_32K>;
+                       clock-names = "hsio", "suspend";
+                       interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
+                       #address-cells = <2>;
+                       #size-cells = <2>;
+                       ranges;
+                       power-domains = <&scmi_devpd IMX95_PD_HSIO_TOP>;
+                       dma-ranges = <0x0 0x0 0x0 0x0 0x10 0x0>;
+                       status = "disabled";
+
+                       usb3_dwc3: usb@4c100000 {
+                               compatible = "snps,dwc3";
+                               reg = <0x0 0x4c100000 0x0 0x10000>;
+                               clocks = <&scmi_clk IMX95_CLK_HSIO>,
+                                        <&scmi_clk IMX95_CLK_24M>,
+                                        <&scmi_clk IMX95_CLK_32K>;
+                               clock-names = "bus_early", "ref", "suspend";
+                               interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
+                               phys = <&usb3_phy>, <&usb3_phy>;
+                               phy-names = "usb2-phy", "usb3-phy";
+                               snps,gfladj-refclk-lpm-sel-quirk;
+                               snps,parkmode-disable-ss-quirk;
+                               iommus = <&smmu 0xe>;
+                       };
+               };
+
+               usb3_phy: phy@4c1f0040 {
+                       compatible = "fsl,imx95-usb-phy", "fsl,imx8mp-usb-phy";
+                       reg = <0x0 0x4c1f0040 0x0 0x40>,
+                             <0x0 0x4c1fc000 0x0 0x100>;
+                       clocks = <&scmi_clk IMX95_CLK_HSIO>;
+                       clock-names = "phy";
+                       #phy-cells = <0>;
+                       power-domains = <&scmi_devpd IMX95_PD_HSIO_TOP>;
+                       status = "disabled";
+               };
+
                pcie0: pcie@4c300000 {
                        compatible = "fsl,imx95-pcie";
                        reg = <0 0x4c300000 0 0x10000>,