drm/amdgpu: Set PG state to gating for vcn_v_5_0_1

For vcn_v_5_0_1, set power state to gating during hw fini. Also there may
be scenario where VCN engine hangs during a job execution, then it's not
safe to assume that set_pg_state works fine during hw_fini to put the state
to gated. After a reset, we can assume that it's in the default state,
therefore reset the driver maintained state. Put the default state as gated
during reset as per this assumption.

Signed-off-by: Asad Kamal <asad.kamal@amd.com>
Suggested-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c b/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c
index d29e8d6851941b64f1b39325f150ce1f44054782..25f3cd7ffe84ed8c5f56b785e2eb7fb6d612ee1f 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c
@@ -227,8 +227,13 @@ static int vcn_v5_0_1_hw_fini(struct amdgpu_ip_block *ip_block)
        struct amdgpu_device *adev = ip_block->adev;
        int i;
 
-       for (i = 0; i < adev->vcn.num_vcn_inst; ++i)
+       for (i = 0; i < adev->vcn.num_vcn_inst; ++i) {
+               struct amdgpu_vcn_inst *vinst = &adev->vcn.inst[i];
+
                cancel_delayed_work_sync(&adev->vcn.inst[i].idle_work);
+               if (vinst->cur_state != AMD_PG_STATE_GATE)
+                       vinst->set_pg_state(vinst, AMD_PG_STATE_GATE);
+       }
 
        return 0;
 }
@@ -271,6 +276,11 @@ static int vcn_v5_0_1_resume(struct amdgpu_ip_block *ip_block)
        int r, i;
 
        for (i = 0; i < adev->vcn.num_vcn_inst; i++) {
+               struct amdgpu_vcn_inst *vinst = &adev->vcn.inst[i];
+
+               if (amdgpu_in_reset(adev))
+                       vinst->cur_state = AMD_PG_STATE_GATE;
+
                r = amdgpu_vcn_resume(ip_block->adev, i);
                if (r)
                        return r;