drm/msm/dpu: enable SmartDMA on SC8180X

Reworking of the catalog dropped the SmartDMA feature bit on the SC8180X
platform. Renable SmartDMA support on this SoC.

Fixes: 460c410f02e4 ("drm/msm/dpu: duplicate sdm845 catalog entries")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/650421/
Link: https://lore.kernel.org/r/20250425-dpu-rework-vig-masks-v2-2-c71900687d08@oss.qualcomm.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>

diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h
index 5300c246b67b1e3deeeeccf5e987edf1cc45f721..d6f8b1030c68a428a144428b422b63b960c2fdba 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h
@@ -75,7 +75,7 @@ static const struct dpu_sspp_cfg sc8180x_sspp[] = {
        {
                .name = "sspp_0", .id = SSPP_VIG0,
                .base = 0x4000, .len = 0x1f0,
-               .features = VIG_SDM845_MASK,
+               .features = VIG_SDM845_MASK_SDMA,
                .sblk = &dpu_vig_sblk_qseed3_1_4,
                .xin_id = 0,
                .type = SSPP_TYPE_VIG,
@@ -83,7 +83,7 @@ static const struct dpu_sspp_cfg sc8180x_sspp[] = {
        }, {
                .name = "sspp_1", .id = SSPP_VIG1,
                .base = 0x6000, .len = 0x1f0,
-               .features = VIG_SDM845_MASK,
+               .features = VIG_SDM845_MASK_SDMA,
                .sblk = &dpu_vig_sblk_qseed3_1_4,
                .xin_id = 4,
                .type = SSPP_TYPE_VIG,
@@ -91,7 +91,7 @@ static const struct dpu_sspp_cfg sc8180x_sspp[] = {
        }, {
                .name = "sspp_2", .id = SSPP_VIG2,
                .base = 0x8000, .len = 0x1f0,
-               .features = VIG_SDM845_MASK,
+               .features = VIG_SDM845_MASK_SDMA,
                .sblk = &dpu_vig_sblk_qseed3_1_4,
                .xin_id = 8,
                .type = SSPP_TYPE_VIG,
@@ -99,7 +99,7 @@ static const struct dpu_sspp_cfg sc8180x_sspp[] = {
        }, {
                .name = "sspp_3", .id = SSPP_VIG3,
                .base = 0xa000, .len = 0x1f0,
-               .features = VIG_SDM845_MASK,
+               .features = VIG_SDM845_MASK_SDMA,
                .sblk = &dpu_vig_sblk_qseed3_1_4,
                .xin_id = 12,
                .type = SSPP_TYPE_VIG,
@@ -107,7 +107,7 @@ static const struct dpu_sspp_cfg sc8180x_sspp[] = {
        }, {
                .name = "sspp_8", .id = SSPP_DMA0,
                .base = 0x24000, .len = 0x1f0,
-               .features = DMA_SDM845_MASK,
+               .features = DMA_SDM845_MASK_SDMA,
                .sblk = &dpu_dma_sblk,
                .xin_id = 1,
                .type = SSPP_TYPE_DMA,
@@ -115,7 +115,7 @@ static const struct dpu_sspp_cfg sc8180x_sspp[] = {
        }, {
                .name = "sspp_9", .id = SSPP_DMA1,
                .base = 0x26000, .len = 0x1f0,
-               .features = DMA_SDM845_MASK,
+               .features = DMA_SDM845_MASK_SDMA,
                .sblk = &dpu_dma_sblk,
                .xin_id = 5,
                .type = SSPP_TYPE_DMA,
@@ -123,7 +123,7 @@ static const struct dpu_sspp_cfg sc8180x_sspp[] = {
        }, {
                .name = "sspp_10", .id = SSPP_DMA2,
                .base = 0x28000, .len = 0x1f0,
-               .features = DMA_CURSOR_SDM845_MASK,
+               .features = DMA_CURSOR_SDM845_MASK_SDMA,
                .sblk = &dpu_dma_sblk,
                .xin_id = 9,
                .type = SSPP_TYPE_DMA,
@@ -131,7 +131,7 @@ static const struct dpu_sspp_cfg sc8180x_sspp[] = {
        }, {
                .name = "sspp_11", .id = SSPP_DMA3,
                .base = 0x2a000, .len = 0x1f0,
-               .features = DMA_CURSOR_SDM845_MASK,
+               .features = DMA_CURSOR_SDM845_MASK_SDMA,
                .sblk = &dpu_dma_sblk,
                .xin_id = 13,
                .type = SSPP_TYPE_DMA,