net: phy: Optimize phy speed mask to be compatible to yt8821

yt8521 and yt8531s as Gigabit transceiver use bit15:14(bit9 reserved
default 0) as phy speed mask, yt8821 as 2.5G transceiver uses bit9 bit15:14
as phy speed mask.

Be compatible to yt8821, reform phy speed mask and phy speed macro.

Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Frank Sae <Frank.Sae@motor-comm.com>
Signed-off-by: Paolo Abeni <pabeni@redhat.com>

diff --git a/drivers/net/phy/motorcomm.c b/drivers/net/phy/motorcomm.c
index 7a11fdb687cc411d5144a75e212ec426cd327476..fe0aabe12622bf55ece2b765278b811b6e1a91fb 100644 (file)
--- a/drivers/net/phy/motorcomm.c
+++ b/drivers/net/phy/motorcomm.c
@@ -46,12 +46,10 @@
 
 /* Specific Status Register */
 #define YTPHY_SPECIFIC_STATUS_REG              0x11
-#define YTPHY_SSR_SPEED_MODE_OFFSET            14
-
-#define YTPHY_SSR_SPEED_MODE_MASK              (BIT(15) | BIT(14))
-#define YTPHY_SSR_SPEED_10M                    0x0
-#define YTPHY_SSR_SPEED_100M                   0x1
-#define YTPHY_SSR_SPEED_1000M                  0x2
+#define YTPHY_SSR_SPEED_MASK                   ((0x3 << 14) | BIT(9))
+#define YTPHY_SSR_SPEED_10M                    ((0x0 << 14))
+#define YTPHY_SSR_SPEED_100M                   ((0x1 << 14))
+#define YTPHY_SSR_SPEED_1000M                  ((0x2 << 14))
 #define YTPHY_SSR_DUPLEX_OFFSET                        13
 #define YTPHY_SSR_DUPLEX                       BIT(13)
 #define YTPHY_SSR_PAGE_RECEIVED                        BIT(12)
@@ -1187,8 +1185,7 @@ static int yt8521_adjust_status(struct phy_device *phydev, int status,
        else
                duplex = DUPLEX_FULL;   /* for fiber, it always DUPLEX_FULL */
 
-       speed_mode = (status & YTPHY_SSR_SPEED_MODE_MASK) >>
-                    YTPHY_SSR_SPEED_MODE_OFFSET;
+       speed_mode = status & YTPHY_SSR_SPEED_MASK;
 
        switch (speed_mode) {
        case YTPHY_SSR_SPEED_10M: