Use <> to separate the values of property-units will be treated as
multiple arrays. The errors similar to the following will be reported by
property-units.yaml.
ufs@
ff3c0000: freq-table-hz: [[0, 0], [0, 0]] is too long
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
clocks = <&crg_ctrl HI3660_CLK_GATE_UFSIO_REF>,
<&crg_ctrl HI3660_CLK_GATE_UFSPHY_CFG>;
clock-names = "ref_clk", "phy_clk";
- freq-table-hz = <0 0>, <0 0>;
+ freq-table-hz = <0 0
+ 0 0>;
/* offset: 0x84; bit: 12 */
resets = <&crg_rst 0x84 12>;
reset-names = "rst";
clocks = <&crg_ctrl HI3670_CLK_GATE_UFSIO_REF>,
<&crg_ctrl HI3670_CLK_GATE_UFS_SUBSYS>;
clock-names = "ref_clk", "phy_clk";
- freq-table-hz = <0 0>, <0 0>;
+ freq-table-hz = <0 0
+ 0 0>;
/* offset: 0x84; bit: 12 */
resets = <&crg_rst 0x84 12>;
reset-names = "rst";
gmacphyrst: reset-controller {
compatible = "ti,syscon-reset";
#reset-cells = <1>;
- ti,reset-bits =
- <0xcc 12 0xcc 12 0 0 (ASSERT_CLEAR |
- DEASSERT_SET|STATUS_NONE)>,
- <0xcc 13 0xcc 13 0 0 (ASSERT_CLEAR |
- DEASSERT_SET|STATUS_NONE)>;
+ ti,reset-bits = <
+ 0xcc 12 0xcc 12 0 0 (ASSERT_CLEAR | DEASSERT_SET | STATUS_NONE)
+ 0xcc 13 0xcc 13 0 0 (ASSERT_CLEAR | DEASSERT_SET | STATUS_NONE)
+ >;
};
};