drm/nouveau/fifo: add chid_nr()
authorBen Skeggs <bskeggs@redhat.com>
Wed, 1 Jun 2022 10:47:21 +0000 (20:47 +1000)
committerBen Skeggs <bskeggs@redhat.com>
Wed, 9 Nov 2022 00:44:46 +0000 (10:44 +1000)
- reads channel count from GPU from gm200 onwards
- removes gm20b/gp10b (they become identical to gm200/gp100)

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
25 files changed:
drivers/gpu/drm/nouveau/include/nvkm/core/os.h
drivers/gpu/drm/nouveau/include/nvkm/engine/fifo.h
drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
drivers/gpu/drm/nouveau/nvkm/engine/fifo/Kbuild
drivers/gpu/drm/nouveau/nvkm/engine/fifo/base.c
drivers/gpu/drm/nouveau/nvkm/engine/fifo/g84.c
drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c
drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c
drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.h
drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk110.c
drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk208.c
drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk20a.c
drivers/gpu/drm/nouveau/nvkm/engine/fifo/gm107.c
drivers/gpu/drm/nouveau/nvkm/engine/fifo/gm200.c
drivers/gpu/drm/nouveau/nvkm/engine/fifo/gm20b.c [deleted file]
drivers/gpu/drm/nouveau/nvkm/engine/fifo/gp100.c
drivers/gpu/drm/nouveau/nvkm/engine/fifo/gp10b.c [deleted file]
drivers/gpu/drm/nouveau/nvkm/engine/fifo/gv100.c
drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv04.c
drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv10.c
drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv17.c
drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv40.c
drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv50.c
drivers/gpu/drm/nouveau/nvkm/engine/fifo/priv.h
drivers/gpu/drm/nouveau/nvkm/engine/fifo/tu102.c

index d7ba3205207fe28d1c93d16e4bb234e9ad4dd67f..5a516b903fe9d02b3bb7454c88ac16cce6d4a41e 100644 (file)
@@ -34,4 +34,5 @@ nvkm_blob_dtor(struct nvkm_blob *blob)
        blob->data = NULL;
        blob->size = 0;
 }
+
 #endif
index 5a19c71f7ccbdf8ed732f78e14ce3a1ee5d50f0d..3cc7cfebfa5e6530ccbc039efa199f1fceb5cc98 100644 (file)
@@ -72,9 +72,7 @@ int gk208_fifo_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct
 int gk20a_fifo_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_fifo **);
 int gm107_fifo_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_fifo **);
 int gm200_fifo_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_fifo **);
-int gm20b_fifo_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_fifo **);
 int gp100_fifo_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_fifo **);
-int gp10b_fifo_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_fifo **);
 int gv100_fifo_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_fifo **);
 int tu102_fifo_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_fifo **);
 int ga102_fifo_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_fifo **);
index 587aebcda78c9956f46f557c093d48afaa393a31..532231f1a0f5327d32f552770b6eefaffd298283 100644 (file)
@@ -2130,7 +2130,7 @@ nv12b_chipset = {
        .volt     = { 0x00000001, gm20b_volt_new },
        .ce       = { 0x00000004, gm200_ce_new },
        .dma      = { 0x00000001, gf119_dma_new },
-       .fifo     = { 0x00000001, gm20b_fifo_new },
+       .fifo     = { 0x00000001, gm200_fifo_new },
        .gr       = { 0x00000001, gm20b_gr_new },
        .sw       = { 0x00000001, gf100_sw_new },
 };
@@ -2356,7 +2356,7 @@ nv13b_chipset = {
        .top      = { 0x00000001, gk104_top_new },
        .ce       = { 0x00000001, gp100_ce_new },
        .dma      = { 0x00000001, gf119_dma_new },
-       .fifo     = { 0x00000001, gp10b_fifo_new },
+       .fifo     = { 0x00000001, gp100_fifo_new },
        .gr       = { 0x00000001, gp10b_gr_new },
        .sw       = { 0x00000001, gf100_sw_new },
 };
index 0fa4df2990095062f1a1da0c5a271d2b84923d08..8599063e86223701e6ed691692765246fda2dedf 100644 (file)
@@ -13,9 +13,7 @@ nvkm-y += nvkm/engine/fifo/gk208.o
 nvkm-y += nvkm/engine/fifo/gk20a.o
 nvkm-y += nvkm/engine/fifo/gm107.o
 nvkm-y += nvkm/engine/fifo/gm200.o
-nvkm-y += nvkm/engine/fifo/gm20b.o
 nvkm-y += nvkm/engine/fifo/gp100.o
-nvkm-y += nvkm/engine/fifo/gp10b.o
 nvkm-y += nvkm/engine/fifo/gv100.o
 nvkm-y += nvkm/engine/fifo/tu102.o
 nvkm-y += nvkm/engine/fifo/ga102.o
index 518f3c492f01762cc34ba2d39712387efa364f16..b11a4cb18fc7846dac5e6294490a4ca76d4ef343 100644 (file)
 #include "priv.h"
 #include "chan.h"
 
-#include <core/client.h>
 #include <core/gpuobj.h>
 #include <subdev/mc.h>
 
-#include <nvif/event.h>
 #include <nvif/cl0080.h>
 #include <nvif/unpack.h>
 
+#include "gk104.h"
+
 void
 nvkm_fifo_recover_chan(struct nvkm_fifo *fifo, int chid)
 {
@@ -290,25 +290,27 @@ nvkm_fifo = {
 
 int
 nvkm_fifo_ctor(const struct nvkm_fifo_func *func, struct nvkm_device *device,
-              enum nvkm_subdev_type type, int inst, int nr, struct nvkm_fifo *fifo)
+              enum nvkm_subdev_type type, int inst, struct nvkm_fifo *fifo)
 {
-       int ret;
+       int ret, nr;
 
        fifo->func = func;
-       INIT_LIST_HEAD(&fifo->chan);
        spin_lock_init(&fifo->lock);
        mutex_init(&fifo->mutex);
 
+       ret = nvkm_engine_ctor(&nvkm_fifo, device, type, inst, true, &fifo->engine);
+       if (ret)
+               return ret;
+
+       INIT_LIST_HEAD(&fifo->chan);
+
+       nr = func->chid_nr ? func->chid_nr(fifo) : gk104_fifo(fifo)->func->chid_nr(fifo);
        if (WARN_ON(fifo->nr > NVKM_FIFO_CHID_NR))
                fifo->nr = NVKM_FIFO_CHID_NR;
        else
                fifo->nr = nr;
        bitmap_clear(fifo->mask, 0, fifo->nr);
 
-       ret = nvkm_engine_ctor(&nvkm_fifo, device, type, inst, true, &fifo->engine);
-       if (ret)
-               return ret;
-
        if (func->uevent_init) {
                ret = nvkm_event_init(&nvkm_fifo_uevent_func, &fifo->engine.subdev, 1, 1,
                                      &fifo->uevent);
index 3885c3830b949a6d2e29582dd819072cbf46d75d..c452388fd2a59d26388efbc1b8ca84f8c7124fc3 100644 (file)
@@ -110,6 +110,7 @@ static const struct nvkm_fifo_func
 g84_fifo = {
        .dtor = nv50_fifo_dtor,
        .oneinit = nv50_fifo_oneinit,
+       .chid_nr = nv50_fifo_chid_nr,
        .init = nv50_fifo_init,
        .intr = nv04_fifo_intr,
        .engine_id = g84_fifo_engine_id,
index 8b4f36b3e34b5d8960835376ed848fba4b035c45..e10c094c9a7de9ae86e4fb3dccc94b3dd43d1005 100644 (file)
@@ -669,6 +669,7 @@ static const struct nvkm_fifo_func
 gf100_fifo = {
        .dtor = gf100_fifo_dtor,
        .oneinit = gf100_fifo_oneinit,
+       .chid_nr = nv50_fifo_chid_nr,
        .init = gf100_fifo_init,
        .fini = gf100_fifo_fini,
        .intr = gf100_fifo_intr,
@@ -695,5 +696,5 @@ gf100_fifo_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
        INIT_WORK(&fifo->recover.work, gf100_fifo_recover_work);
        *pfifo = &fifo->base;
 
-       return nvkm_fifo_ctor(&gf100_fifo, device, type, inst, 128, &fifo->base);
+       return nvkm_fifo_ctor(&gf100_fifo, device, type, inst, &fifo->base);
 }
index e771bd519ee24f0e30fc155eecc0cc7f5b9ff86f..e11b5eb8e196e71bcb64c974c24f92964a7e7946 100644 (file)
@@ -1055,6 +1055,12 @@ gk104_fifo_init(struct nvkm_fifo *base)
        nvkm_wr32(device, 0x002140, 0x7fffffff);
 }
 
+int
+gk104_fifo_chid_nr(struct nvkm_fifo *fifo)
+{
+       return 4096;
+}
+
 void *
 gk104_fifo_dtor(struct nvkm_fifo *base)
 {
@@ -1103,7 +1109,7 @@ gk104_fifo_new_(const struct gk104_fifo_func *func, struct nvkm_device *device,
        INIT_WORK(&fifo->recover.work, gk104_fifo_recover_work);
        *pfifo = &fifo->base;
 
-       return nvkm_fifo_ctor(&gk104_fifo_, device, type, inst, nr, &fifo->base);
+       return nvkm_fifo_ctor(&gk104_fifo_, device, type, inst, &fifo->base);
 }
 
 const struct nvkm_enum
@@ -1230,6 +1236,7 @@ gk104_fifo_fault_gpcclient[] = {
 
 static const struct gk104_fifo_func
 gk104_fifo = {
+       .chid_nr = gk104_fifo_chid_nr,
        .intr.fault = gf100_fifo_intr_fault,
        .pbdma = &gk104_fifo_pbdma,
        .fault.access = gk104_fifo_fault_access,
@@ -1245,5 +1252,5 @@ int
 gk104_fifo_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
               struct nvkm_fifo **pfifo)
 {
-       return gk104_fifo_new_(&gk104_fifo, device, type, inst, 4096, pfifo);
+       return gk104_fifo_new_(&gk104_fifo, device, type, inst, 0, pfifo);
 }
index f2d12ae739449ab4e19b703ba06ec9fa86b2e804..5eca8c7579662102ab7825e75f811f7aec61c23f 100644 (file)
@@ -46,6 +46,8 @@ struct gk104_fifo {
 };
 
 struct gk104_fifo_func {
+       int (*chid_nr)(struct nvkm_fifo *);
+
        struct {
                void (*fault)(struct nvkm_fifo *, int unit);
        } intr;
index 915278c7e0128c8feaa4dbbaa03404693e1e0fe7..047e128febd1d6afdbec47bb10ebb7f62067ae1a 100644 (file)
@@ -48,6 +48,7 @@ gk110_fifo_runlist = {
 
 static const struct gk104_fifo_func
 gk110_fifo = {
+       .chid_nr = gk104_fifo_chid_nr,
        .intr.fault = gf100_fifo_intr_fault,
        .pbdma = &gk104_fifo_pbdma,
        .fault.access = gk104_fifo_fault_access,
@@ -63,5 +64,5 @@ int
 gk110_fifo_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
               struct nvkm_fifo **pfifo)
 {
-       return gk104_fifo_new_(&gk110_fifo, device, type, inst, 4096, pfifo);
+       return gk104_fifo_new_(&gk110_fifo, device, type, inst, 0, pfifo);
 }
index cb703693de52c0d52681367376e27cf41f715bdc..89b9c4fa35cc38425e13b16e609e21900c18654c 100644 (file)
@@ -43,8 +43,15 @@ gk208_fifo_pbdma = {
        .init_timeout = gk208_fifo_pbdma_init_timeout,
 };
 
+static int
+gk208_fifo_chid_nr(struct nvkm_fifo *fifo)
+{
+       return 1024;
+}
+
 static const struct gk104_fifo_func
 gk208_fifo = {
+       .chid_nr = gk208_fifo_chid_nr,
        .intr.fault = gf100_fifo_intr_fault,
        .pbdma = &gk208_fifo_pbdma,
        .fault.access = gk104_fifo_fault_access,
@@ -60,5 +67,5 @@ int
 gk208_fifo_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
               struct nvkm_fifo **pfifo)
 {
-       return gk104_fifo_new_(&gk208_fifo, device, type, inst, 1024, pfifo);
+       return gk104_fifo_new_(&gk208_fifo, device, type, inst, 0, pfifo);
 }
index 6e35cf44c640f8de9364fe7185d4f7f2fbfca469..48cdcf9a4a727a48652c0ee825b385f8421f0040 100644 (file)
@@ -26,6 +26,7 @@
 
 static const struct gk104_fifo_func
 gk20a_fifo = {
+       .chid_nr = nv50_fifo_chid_nr,
        .intr.fault = gf100_fifo_intr_fault,
        .pbdma = &gk208_fifo_pbdma,
        .fault.access = gk104_fifo_fault_access,
@@ -41,5 +42,5 @@ int
 gk20a_fifo_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
               struct nvkm_fifo **pfifo)
 {
-       return gk104_fifo_new_(&gk20a_fifo, device, type, inst, 128, pfifo);
+       return gk104_fifo_new_(&gk20a_fifo, device, type, inst, 0, pfifo);
 }
index 7af6e687d47491d83af7954f499ffbeafe1b580f..7b4244f184d248b2388191fd1b97b389b88e3904 100644 (file)
@@ -92,8 +92,15 @@ gm107_fifo_intr_fault(struct nvkm_fifo *fifo, int unit)
        nvkm_fifo_fault(fifo, &info);
 }
 
+static int
+gm107_fifo_chid_nr(struct nvkm_fifo *fifo)
+{
+       return 2048;
+}
+
 static const struct gk104_fifo_func
 gm107_fifo = {
+       .chid_nr = gm107_fifo_chid_nr,
        .intr.fault = gm107_fifo_intr_fault,
        .pbdma = &gk208_fifo_pbdma,
        .fault.access = gk104_fifo_fault_access,
@@ -109,5 +116,5 @@ int
 gm107_fifo_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
               struct nvkm_fifo **pfifo)
 {
-       return gk104_fifo_new_(&gm107_fifo, device, type, inst, 2048, pfifo);
+       return gk104_fifo_new_(&gm107_fifo, device, type, inst, 0, pfifo);
 }
index 573658cb6c73f4c4c9cb03965c44f9eaf6cd9e11..17836a383c7606a0d85fbd7a544d704ba282463f 100644 (file)
@@ -40,8 +40,15 @@ gm200_fifo_pbdma = {
        .init_timeout = gk208_fifo_pbdma_init_timeout,
 };
 
+int
+gm200_fifo_chid_nr(struct nvkm_fifo *fifo)
+{
+       return nvkm_rd32(fifo->engine.subdev.device, 0x002008);
+}
+
 static const struct gk104_fifo_func
 gm200_fifo = {
+       .chid_nr = gm200_fifo_chid_nr,
        .intr.fault = gm107_fifo_intr_fault,
        .pbdma = &gm200_fifo_pbdma,
        .fault.access = gk104_fifo_fault_access,
@@ -57,5 +64,5 @@ int
 gm200_fifo_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
               struct nvkm_fifo **pfifo)
 {
-       return gk104_fifo_new_(&gm200_fifo, device, type, inst, 4096, pfifo);
+       return gk104_fifo_new_(&gm200_fifo, device, type, inst, 0, pfifo);
 }
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gm20b.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gm20b.c
deleted file mode 100644 (file)
index 556c97e..0000000
+++ /dev/null
@@ -1,45 +0,0 @@
-/*
- * Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- */
-#include "gk104.h"
-#include "changk104.h"
-
-#include <nvif/class.h>
-
-static const struct gk104_fifo_func
-gm20b_fifo = {
-       .intr.fault = gm107_fifo_intr_fault,
-       .pbdma = &gm200_fifo_pbdma,
-       .fault.access = gk104_fifo_fault_access,
-       .fault.engine = gm107_fifo_fault_engine,
-       .fault.reason = gk104_fifo_fault_reason,
-       .fault.hubclient = gk104_fifo_fault_hubclient,
-       .fault.gpcclient = gk104_fifo_fault_gpcclient,
-       .runlist = &gm107_fifo_runlist,
-       .chan = {{0,0,MAXWELL_CHANNEL_GPFIFO_A}, gk104_fifo_gpfifo_new },
-};
-
-int
-gm20b_fifo_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
-              struct nvkm_fifo **pfifo)
-{
-       return gk104_fifo_new_(&gm20b_fifo, device, type, inst, 512, pfifo);
-}
index 6b46b6b65b87724ad73158a38420be93a46a0c86..7a1ac3d863ecd025e78cd69c1701474463e8c3af 100644 (file)
@@ -78,6 +78,7 @@ gp100_fifo_intr_fault(struct nvkm_fifo *fifo, int unit)
 
 static const struct gk104_fifo_func
 gp100_fifo = {
+       .chid_nr = gm200_fifo_chid_nr,
        .intr.fault = gp100_fifo_intr_fault,
        .pbdma = &gm200_fifo_pbdma,
        .fault.access = gk104_fifo_fault_access,
@@ -94,5 +95,5 @@ int
 gp100_fifo_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
               struct nvkm_fifo **pfifo)
 {
-       return gk104_fifo_new_(&gp100_fifo, device, type, inst, 4096, pfifo);
+       return gk104_fifo_new_(&gp100_fifo, device, type, inst, 0, pfifo);
 }
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gp10b.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gp10b.c
deleted file mode 100644 (file)
index 7a5929c..0000000
+++ /dev/null
@@ -1,46 +0,0 @@
-/*
- * Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- */
-#include "gk104.h"
-#include "changk104.h"
-
-#include <nvif/class.h>
-
-static const struct gk104_fifo_func
-gp10b_fifo = {
-       .intr.fault = gp100_fifo_intr_fault,
-       .pbdma = &gm200_fifo_pbdma,
-       .fault.access = gk104_fifo_fault_access,
-       .fault.engine = gp100_fifo_fault_engine,
-       .fault.reason = gk104_fifo_fault_reason,
-       .fault.hubclient = gk104_fifo_fault_hubclient,
-       .fault.gpcclient = gk104_fifo_fault_gpcclient,
-       .runlist = &gm107_fifo_runlist,
-       .chan = {{0,0,PASCAL_CHANNEL_GPFIFO_A}, gk104_fifo_gpfifo_new },
-       .cgrp_force = true,
-};
-
-int
-gp10b_fifo_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
-              struct nvkm_fifo **pfifo)
-{
-       return gk104_fifo_new_(&gp10b_fifo, device, type, inst, 512, pfifo);
-}
index f56369d592193ef6a29d35f46b6136c8dd84f59a..0be50120476f13485b9fa83fe8d793ef987c58b7 100644 (file)
@@ -287,6 +287,7 @@ gv100_fifo_fault_access[] = {
 
 static const struct gk104_fifo_func
 gv100_fifo = {
+       .chid_nr = gm200_fifo_chid_nr,
        .pbdma = &gm200_fifo_pbdma,
        .fault.access = gv100_fifo_fault_access,
        .fault.engine = gv100_fifo_fault_engine,
@@ -302,5 +303,5 @@ int
 gv100_fifo_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
               struct nvkm_fifo **pfifo)
 {
-       return gk104_fifo_new_(&gv100_fifo, device, type, inst, 4096, pfifo);
+       return gk104_fifo_new_(&gv100_fifo, device, type, inst, 0, pfifo);
 }
index c6730c124769ca7c7850e91bad5bfd6c40a1c20c..e4b4133be3a4a7ae96ba60bd9f01acd812b69a87 100644 (file)
@@ -356,6 +356,12 @@ nv04_fifo_init(struct nvkm_fifo *base)
        nvkm_wr32(device, NV03_PFIFO_CACHES, 1);
 }
 
+static int
+nv04_fifo_chid_nr(struct nvkm_fifo *fifo)
+{
+       return 16;
+}
+
 int
 nv04_fifo_new_(const struct nvkm_fifo_func *func, struct nvkm_device *device,
               enum nvkm_subdev_type type, int inst, int nr, const struct nv04_fifo_ramfc *ramfc,
@@ -369,7 +375,7 @@ nv04_fifo_new_(const struct nvkm_fifo_func *func, struct nvkm_device *device,
        fifo->ramfc = ramfc;
        *pfifo = &fifo->base;
 
-       ret = nvkm_fifo_ctor(func, device, type, inst, nr, &fifo->base);
+       ret = nvkm_fifo_ctor(func, device, type, inst, &fifo->base);
        if (ret)
                return ret;
 
@@ -379,6 +385,7 @@ nv04_fifo_new_(const struct nvkm_fifo_func *func, struct nvkm_device *device,
 
 static const struct nvkm_fifo_func
 nv04_fifo = {
+       .chid_nr = nv04_fifo_chid_nr,
        .init = nv04_fifo_init,
        .intr = nv04_fifo_intr,
        .engine_id = nv04_fifo_engine_id,
index f8887f0f2f82ac9223bdda847e99a603a49b6068..94ad6ee192977044b6904e9c0fe3a99e5328faae 100644 (file)
@@ -39,8 +39,15 @@ nv10_fifo_ramfc[] = {
        {}
 };
 
+int
+nv10_fifo_chid_nr(struct nvkm_fifo *fifo)
+{
+       return 32;
+}
+
 static const struct nvkm_fifo_func
 nv10_fifo = {
+       .chid_nr = nv10_fifo_chid_nr,
        .init = nv04_fifo_init,
        .intr = nv04_fifo_intr,
        .engine_id = nv04_fifo_engine_id,
index 3f94c7b5b054b7983f0621efa1206e5275a5aa2c..23d320362c861c33eb357ab83f4f95e73db5b178 100644 (file)
@@ -79,6 +79,7 @@ nv17_fifo_init(struct nvkm_fifo *base)
 
 static const struct nvkm_fifo_func
 nv17_fifo = {
+       .chid_nr = nv10_fifo_chid_nr,
        .init = nv17_fifo_init,
        .intr = nv04_fifo_intr,
        .engine_id = nv04_fifo_engine_id,
index f9ea46809bc05aac502eef61bb9723827765a9bb..01e75c80b4f3ab0e8212e28a4893074e3c9abb6f 100644 (file)
@@ -110,6 +110,7 @@ nv40_fifo_init(struct nvkm_fifo *base)
 
 static const struct nvkm_fifo_func
 nv40_fifo = {
+       .chid_nr = nv10_fifo_chid_nr,
        .init = nv40_fifo_init,
        .intr = nv04_fifo_intr,
        .engine_id = nv04_fifo_engine_id,
index a08742cf425aac5dff1ac8e79bac6fa34a2786c8..9d0cfb85640134b97aa7ebe0c8d35b9a45db6abb 100644 (file)
@@ -96,6 +96,12 @@ nv50_fifo_init(struct nvkm_fifo *base)
        nvkm_wr32(device, 0x002500, 0x00000001);
 }
 
+int
+nv50_fifo_chid_nr(struct nvkm_fifo *fifo)
+{
+       return 128;
+}
+
 void *
 nv50_fifo_dtor(struct nvkm_fifo *base)
 {
@@ -116,7 +122,7 @@ nv50_fifo_new_(const struct nvkm_fifo_func *func, struct nvkm_device *device,
                return -ENOMEM;
        *pfifo = &fifo->base;
 
-       ret = nvkm_fifo_ctor(func, device, type, inst, 128, &fifo->base);
+       ret = nvkm_fifo_ctor(func, device, type, inst, &fifo->base);
        if (ret)
                return ret;
 
@@ -129,6 +135,7 @@ static const struct nvkm_fifo_func
 nv50_fifo = {
        .dtor = nv50_fifo_dtor,
        .oneinit = nv50_fifo_oneinit,
+       .chid_nr = nv50_fifo_chid_nr,
        .init = nv50_fifo_init,
        .intr = nv04_fifo_intr,
        .engine_id = nv04_fifo_engine_id,
index 79cec57647f02c14bed8e39d1eb92795036a3c0c..66e93609c3c7fa11e291ed63750ab0ac3de6b956 100644 (file)
@@ -4,8 +4,6 @@
 #define nvkm_fifo(p) container_of((p), struct nvkm_fifo, engine)
 #include <engine/fifo.h>
 
-int nvkm_fifo_ctor(const struct nvkm_fifo_func *, struct nvkm_device *, enum nvkm_subdev_type, int,
-                  int nr, struct nvkm_fifo *);
 void nvkm_fifo_uevent(struct nvkm_fifo *);
 void nvkm_fifo_kevent(struct nvkm_fifo *, int chid);
 void nvkm_fifo_recover_chan(struct nvkm_fifo *, int chid);
@@ -16,7 +14,10 @@ nvkm_fifo_chan_inst_locked(struct nvkm_fifo *, u64 inst);
 struct nvkm_fifo_chan_oclass;
 struct nvkm_fifo_func {
        void *(*dtor)(struct nvkm_fifo *);
+
        int (*oneinit)(struct nvkm_fifo *);
+       int (*chid_nr)(struct nvkm_fifo *);
+
        int (*info)(struct nvkm_fifo *, u64 mthd, u64 *data);
        void (*init)(struct nvkm_fifo *);
        void (*fini)(struct nvkm_fifo *);
@@ -35,14 +36,24 @@ struct nvkm_fifo_func {
        const struct nvkm_fifo_chan_oclass *chan[];
 };
 
+int nvkm_fifo_ctor(const struct nvkm_fifo_func *, struct nvkm_device *, enum nvkm_subdev_type, int,
+                  struct nvkm_fifo *);
+
 void nv04_fifo_intr(struct nvkm_fifo *);
 int nv04_fifo_engine_id(struct nvkm_fifo *, struct nvkm_engine *);
 struct nvkm_engine *nv04_fifo_id_engine(struct nvkm_fifo *, int);
 void nv04_fifo_pause(struct nvkm_fifo *, unsigned long *);
 void nv04_fifo_start(struct nvkm_fifo *, unsigned long *);
 
+int nv10_fifo_chid_nr(struct nvkm_fifo *);
+
+int nv50_fifo_chid_nr(struct nvkm_fifo *);
+
 void gf100_fifo_intr_fault(struct nvkm_fifo *, int);
 
+int gk104_fifo_chid_nr(struct nvkm_fifo *);
 int gk104_fifo_engine_id(struct nvkm_fifo *, struct nvkm_engine *);
 struct nvkm_engine *gk104_fifo_id_engine(struct nvkm_fifo *, int);
+
+int gm200_fifo_chid_nr(struct nvkm_fifo *);
 #endif
index b800cfc5bfd919da2887acae2b933ce9ffc48317..63a3a2c0a824bb8481a80629b5ef6c523d96a928 100644 (file)
 #include "changk104.h"
 
 #include <core/client.h>
-#include <core/gpuobj.h>
+#include <core/memory.h>
 #include <subdev/bar.h>
 #include <subdev/fault.h>
 #include <subdev/top.h>
-#include <subdev/timer.h>
-#include <engine/sw.h>
 
 #include <nvif/class.h>
 
@@ -100,19 +98,6 @@ tu102_fifo_pbdma = {
        .init_timeout = gk208_fifo_pbdma_init_timeout,
 };
 
-static const struct gk104_fifo_func
-tu102_fifo = {
-       .pbdma = &tu102_fifo_pbdma,
-       .fault.access = gv100_fifo_fault_access,
-       .fault.engine = tu102_fifo_fault_engine,
-       .fault.reason = gv100_fifo_fault_reason,
-       .fault.hubclient = gv100_fifo_fault_hubclient,
-       .fault.gpcclient = gv100_fifo_fault_gpcclient,
-       .runlist = &tu102_fifo_runlist,
-       .chan = {{ 0, 0,TURING_CHANNEL_GPFIFO_A}, tu102_fifo_gpfifo_new },
-       .cgrp_force = true,
-};
-
 static void
 tu102_fifo_recover_work(struct work_struct *w)
 {
@@ -459,6 +444,20 @@ tu102_fifo_ = {
        .class_new = gk104_fifo_class_new,
 };
 
+static const struct gk104_fifo_func
+tu102_fifo = {
+       .chid_nr = gm200_fifo_chid_nr,
+       .pbdma = &tu102_fifo_pbdma,
+       .fault.access = gv100_fifo_fault_access,
+       .fault.engine = tu102_fifo_fault_engine,
+       .fault.reason = gv100_fifo_fault_reason,
+       .fault.hubclient = gv100_fifo_fault_hubclient,
+       .fault.gpcclient = gv100_fifo_fault_gpcclient,
+       .runlist = &tu102_fifo_runlist,
+       .chan = {{ 0, 0,TURING_CHANNEL_GPFIFO_A}, tu102_fifo_gpfifo_new },
+       .cgrp_force = true,
+};
+
 int
 tu102_fifo_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
               struct nvkm_fifo **pfifo)
@@ -471,5 +470,5 @@ tu102_fifo_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
        INIT_WORK(&fifo->recover.work, tu102_fifo_recover_work);
        *pfifo = &fifo->base;
 
-       return nvkm_fifo_ctor(&tu102_fifo_, device, type, inst, 4096, &fifo->base);
+       return nvkm_fifo_ctor(&tu102_fifo_, device, type, inst, &fifo->base);
 }