Merge tag 'reset-for-v5.3' of git://git.pengutronix.de/git/pza/linux into arm/drivers

Reset controller changes for v5.3

This tag adds support for the Bitmain BM1880 reset controller to the
reset-simple driver and fixes a spelling mistake in the i.MX7 reset
controller binding document.

* tag 'reset-for-v5.3' of git://git.pengutronix.de/git/pza/linux:
  dt-bindings: reset: imx7: Fix the spelling of 'indices'
  reset: Add reset controller support for BM1880 SoC
  dt-bindings: reset: Add devicetree binding for BM1880 reset controller

Link: https://lore.kernel.org/r/1562236632.6641.14.camel@pengutronix.de
Signed-off-by: Olof Johansson <olof@lixom.net>

diff --git a/Documentation/devicetree/bindings/reset/bitmain,bm1880-reset.txt b/Documentation/devicetree/bindings/reset/bitmain,bm1880-reset.txt
new file mode 100644 (file)
index 0000000..a6f8455
--- /dev/null
+++ b/Documentation/devicetree/bindings/reset/bitmain,bm1880-reset.txt
@@ -0,0 +1,18 @@
+Bitmain BM1880 SoC Reset Controller
+===================================
+
+Please also refer to reset.txt in this directory for common reset
+controller binding usage.
+
+Required properties:
+- compatible:   Should be "bitmain,bm1880-reset"
+- reg:          Offset and length of reset controller space in SCTRL.
+- #reset-cells: Must be 1.
+
+Example:
+
+        rst: reset-controller@c00 {
+                compatible = "bitmain,bm1880-reset";
+                reg = <0xc00 0x8>;
+                #reset-cells = <1>;
+        };

diff --git a/Documentation/devicetree/bindings/reset/fsl,imx7-src.txt b/Documentation/devicetree/bindings/reset/fsl,imx7-src.txt
index 2ecf33815d1823cb41a2a51bde0c24adcc956b88..13e095182db4c6e305e7e7f6b05f3fd87e83ec15 100644 (file)
--- a/Documentation/devicetree/bindings/reset/fsl,imx7-src.txt
+++ b/Documentation/devicetree/bindings/reset/fsl,imx7-src.txt
@@ -45,6 +45,6 @@ Example:
         };
 
 
-For list of all valid reset indicies see
+For list of all valid reset indices see
 <dt-bindings/reset/imx7-reset.h> for i.MX7 and
 <dt-bindings/reset/imx8mq-reset.h> for i.MX8MQ

diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
index d506d32385fcddb6eb88cf8628ce788d36a3b8e1..21efb7d39d627b07907b49d3156419a70eca2d34 100644 (file)
--- a/drivers/reset/Kconfig
+++ b/drivers/reset/Kconfig
@@ -118,7 +118,7 @@ config RESET_QCOM_PDC
 
 config RESET_SIMPLE
        bool "Simple Reset Controller Driver" if COMPILE_TEST
-       default ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI || ARCH_ZX || ARCH_ASPEED
+       default ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI || ARCH_ZX || ARCH_ASPEED || ARCH_BITMAIN
        help
          This enables a simple reset controller driver for reset lines that
          that can be asserted and deasserted by toggling bits in a contiguous,
@@ -130,6 +130,7 @@ config RESET_SIMPLE
           - RCC reset controller in STM32 MCUs
           - Allwinner SoCs
           - ZTE's zx2967 family
+          - Bitmain BM1880 SoC
 
 config RESET_STM32MP157
        bool "STM32MP157 Reset Driver" if COMPILE_TEST

diff --git a/drivers/reset/reset-simple.c b/drivers/reset/reset-simple.c
index 7e48b9c05ecdd15cf3d059f0f531c52f0dc73852..1154f7b1f4ddbd1ef2cc1f8a5f8a165e2724f2ad 100644 (file)
--- a/drivers/reset/reset-simple.c
+++ b/drivers/reset/reset-simple.c
@@ -125,6 +125,8 @@ static const struct of_device_id reset_simple_dt_ids[] = {
                .data = &reset_simple_active_low },
        { .compatible = "aspeed,ast2400-lpc-reset" },
        { .compatible = "aspeed,ast2500-lpc-reset" },
+       { .compatible = "bitmain,bm1880-reset",
+               .data = &reset_simple_active_low },
        { /* sentinel */ },
 };
 

diff --git a/include/dt-bindings/reset/bitmain,bm1880-reset.h b/include/dt-bindings/reset/bitmain,bm1880-reset.h
new file mode 100644 (file)
index 0000000..4c0de52
--- /dev/null
+++ b/include/dt-bindings/reset/bitmain,bm1880-reset.h
@@ -0,0 +1,51 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (c) 2018 Bitmain Ltd.
+ * Copyright (c) 2019 Linaro Ltd.
+ */
+
+#ifndef _DT_BINDINGS_BM1880_RESET_H
+#define _DT_BINDINGS_BM1880_RESET_H
+
+#define BM1880_RST_MAIN_AP             0
+#define BM1880_RST_SECOND_AP           1
+#define BM1880_RST_DDR                 2
+#define BM1880_RST_VIDEO               3
+#define BM1880_RST_JPEG                        4
+#define BM1880_RST_VPP                 5
+#define BM1880_RST_GDMA                        6
+#define BM1880_RST_AXI_SRAM            7
+#define BM1880_RST_TPU                 8
+#define BM1880_RST_USB                 9
+#define BM1880_RST_ETH0                        10
+#define BM1880_RST_ETH1                        11
+#define BM1880_RST_NAND                        12
+#define BM1880_RST_EMMC                        13
+#define BM1880_RST_SD                  14
+#define BM1880_RST_SDMA                        15
+#define BM1880_RST_I2S0                        16
+#define BM1880_RST_I2S1                        17
+#define BM1880_RST_UART0_1_CLK         18
+#define BM1880_RST_UART0_1_ACLK                19
+#define BM1880_RST_UART2_3_CLK         20
+#define BM1880_RST_UART2_3_ACLK                21
+#define BM1880_RST_MINER               22
+#define BM1880_RST_I2C0                        23
+#define BM1880_RST_I2C1                        24
+#define BM1880_RST_I2C2                        25
+#define BM1880_RST_I2C3                        26
+#define BM1880_RST_I2C4                        27
+#define BM1880_RST_PWM0                        28
+#define BM1880_RST_PWM1                        29
+#define BM1880_RST_PWM2                        30
+#define BM1880_RST_PWM3                        31
+#define BM1880_RST_SPI                 32
+#define BM1880_RST_GPIO0               33
+#define BM1880_RST_GPIO1               34
+#define BM1880_RST_GPIO2               35
+#define BM1880_RST_EFUSE               36
+#define BM1880_RST_WDT                 37
+#define BM1880_RST_AHB_ROM             38
+#define BM1880_RST_SPIC                        39
+
+#endif /* _DT_BINDINGS_BM1880_RESET_H */