x86/sev: Cleanup vc_handle_msr()

Carve out the MSR_SVSM_CAA into a helper with the suggestion that
upcoming future users should do the same. Rename that silly exit_info_1
into what it actually means in this function - whether the MSR access is
a read or a write.

No functional changes.

Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Reviewed-by: Tom Lendacky <thomas.lendacky@amd.com>
Reviewed-by: Pankaj Gupta <pankaj.gupta@amd.com>
Link: https://lore.kernel.org/r/20241106172647.GAZyum1zngPDwyD2IJ@fat_crate.local

diff --git a/arch/x86/coco/sev/core.c b/arch/x86/coco/sev/core.c
index 97f445f3366a5ef0260c52e0cf7b21a0f400313b..c5b0148b8c0a191f5aa38af73a52c77d6bba3e2d 100644 (file)
--- a/arch/x86/coco/sev/core.c
+++ b/arch/x86/coco/sev/core.c
@@ -1406,35 +1406,39 @@ int __init sev_es_efi_map_ghcbs(pgd_t *pgd)
        return 0;
 }
 
+/* Writes to the SVSM CAA MSR are ignored */
+static enum es_result __vc_handle_msr_caa(struct pt_regs *regs, bool write)
+{
+       if (write)
+               return ES_OK;
+
+       regs->ax = lower_32_bits(this_cpu_read(svsm_caa_pa));
+       regs->dx = upper_32_bits(this_cpu_read(svsm_caa_pa));
+
+       return ES_OK;
+}
+
 static enum es_result vc_handle_msr(struct ghcb *ghcb, struct es_em_ctxt *ctxt)
 {
        struct pt_regs *regs = ctxt->regs;
        enum es_result ret;
-       u64 exit_info_1;
+       bool write;
 
        /* Is it a WRMSR? */
-       exit_info_1 = (ctxt->insn.opcode.bytes[1] == 0x30) ? 1 : 0;
-
-       if (regs->cx == MSR_SVSM_CAA) {
-               /* Writes to the SVSM CAA msr are ignored */
-               if (exit_info_1)
-                       return ES_OK;
-
-               regs->ax = lower_32_bits(this_cpu_read(svsm_caa_pa));
-               regs->dx = upper_32_bits(this_cpu_read(svsm_caa_pa));
+       write = ctxt->insn.opcode.bytes[1] == 0x30;
 
-               return ES_OK;
-       }
+       if (regs->cx == MSR_SVSM_CAA)
+               return __vc_handle_msr_caa(regs, write);
 
        ghcb_set_rcx(ghcb, regs->cx);
-       if (exit_info_1) {
+       if (write) {
                ghcb_set_rax(ghcb, regs->ax);
                ghcb_set_rdx(ghcb, regs->dx);
        }
 
-       ret = sev_es_ghcb_hv_call(ghcb, ctxt, SVM_EXIT_MSR, exit_info_1, 0);
+       ret = sev_es_ghcb_hv_call(ghcb, ctxt, SVM_EXIT_MSR, write, 0);
 
-       if ((ret == ES_OK) && (!exit_info_1)) {
+       if ((ret == ES_OK) && !write) {
                regs->ax = ghcb->save.rax;
                regs->dx = ghcb->save.rdx;
        }