net/mlx5: Allow co-enablement of uplink LAG and SRIOV
authorRabie Loulou <rabiel@mellanox.com>
Wed, 23 May 2018 11:19:07 +0000 (14:19 +0300)
committerSaeed Mahameed <saeedm@mellanox.com>
Fri, 14 Dec 2018 21:28:54 +0000 (13:28 -0800)
Enable setting uplink LAG if sriov is enabled on both ports in switchdev
mode.

Once the sriov mode is changed from switchdev for any of the ports, the
LAG instance is disabled.

Signed-off-by: Rabie Loulou <rabiel@mellanox.com>
Signed-off-by: Aviv Heller <avivh@mellanox.com>
Signed-off-by: Jianbo Liu <jianbol@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
drivers/net/ethernet/mellanox/mlx5/core/eswitch.c

index 70d0d9aa6b5dab6cfa52d544e527212d4f1343d1..ef2bec50423d32eab07dd0c5422e241a7fd39989 100644 (file)
@@ -2232,8 +2232,10 @@ EXPORT_SYMBOL_GPL(mlx5_eswitch_mode);
 
 bool mlx5_esw_lag_prereq(struct mlx5_core_dev *dev0, struct mlx5_core_dev *dev1)
 {
-       if (dev0->priv.eswitch->mode == SRIOV_NONE &&
-           dev1->priv.eswitch->mode == SRIOV_NONE)
+       if ((dev0->priv.eswitch->mode == SRIOV_NONE &&
+            dev1->priv.eswitch->mode == SRIOV_NONE) ||
+           (dev0->priv.eswitch->mode == SRIOV_OFFLOADS &&
+            dev1->priv.eswitch->mode == SRIOV_OFFLOADS))
                return true;
 
        return false;