arm64: dts: ti: k3-am67a-beagley-ai: Add remote processor nodes
authorAndrew Davis <afd@ti.com>
Tue, 3 Dec 2024 17:41:14 +0000 (11:41 -0600)
committerNishanth Menon <nm@ti.com>
Thu, 2 Jan 2025 15:53:16 +0000 (09:53 -0600)
Add nodes for the R5F and C7x cores on the SoC. This includes the mailbox
and memory carveouts used by these remote cores.

Signed-off-by: Andrew Davis <afd@ti.com>
Link: https://lore.kernel.org/r/20241203174114.94751-2-afd@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
arch/arm64/boot/dts/ti/k3-am67a-beagley-ai.dts

index 44dfbdf892775ca18236fbebe336d13d53fc8825..9be6bba28c26fb182e07b9fc88fb378dd72541c4 100644 (file)
                        no-map;
                };
 
+               wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {
+                       compatible = "shared-dma-pool";
+                       reg = <0x00 0xa0000000 0x00 0x100000>;
+                       no-map;
+               };
+
                wkup_r5fss0_core0_memory_region: r5f-memory@a0100000 {
                        compatible = "shared-dma-pool";
                        reg = <0x00 0xa0100000 0x00 0xf00000>;
                        no-map;
                };
+
+               mcu_r5fss0_core0_dma_memory_region: mcu-r5fss-dma-memory-region@a1000000 {
+                       compatible = "shared-dma-pool";
+                       reg = <0x00 0xa1000000 0x00 0x100000>;
+                       no-map;
+               };
+
+               mcu_r5fss0_core0_memory_region: mcu-r5fss-memory-region@a1100000 {
+                       compatible = "shared-dma-pool";
+                       reg = <0x00 0xa1100000 0x00 0xf00000>;
+                       no-map;
+               };
+
+               main_r5fss0_core0_dma_memory_region: main-r5fss-dma-memory-region@a2000000 {
+                       compatible = "shared-dma-pool";
+                       reg = <0x00 0xa2000000 0x00 0x100000>;
+                       no-map;
+               };
+
+               main_r5fss0_core0_memory_region: main-r5fss-memory-region@a2100000 {
+                       compatible = "shared-dma-pool";
+                       reg = <0x00 0xa2100000 0x00 0xf00000>;
+                       no-map;
+               };
+
+               c7x_0_dma_memory_region: c7x-dma-memory@a3000000 {
+                       compatible = "shared-dma-pool";
+                       reg = <0x00 0xa3000000 0x00 0x100000>;
+                       no-map;
+               };
+
+               c7x_0_memory_region: c7x-memory@a3100000 {
+                       compatible = "shared-dma-pool";
+                       reg = <0x00 0xa3100000 0x00 0xf00000>;
+                       no-map;
+               };
+
+               c7x_1_dma_memory_region: c7x-dma-memory@a4000000 {
+                       compatible = "shared-dma-pool";
+                       reg = <0x00 0xa4000000 0x00 0x100000>;
+                       no-map;
+               };
+
+               c7x_1_memory_region: c7x-memory@a4100000 {
+                       compatible = "shared-dma-pool";
+                       reg = <0x00 0xa4100000 0x00 0xf00000>;
+                       no-map;
+               };
+
+               rtos_ipc_memory_region: ipc-memories@a5000000 {
+                       reg = <0x00 0xa5000000 0x00 0x1c00000>;
+                       alignment = <0x1000>;
+                       no-map;
+               };
        };
 
        vsys_5v0: regulator-1 {
        ti,fails-without-test-cd;
        status = "okay";
 };
+
+&mailbox0_cluster0 {
+       status = "okay";
+
+       mbox_wkup_r5_0: mbox-wkup-r5-0 {
+               ti,mbox-rx = <0 0 0>;
+               ti,mbox-tx = <1 0 0>;
+       };
+};
+
+&mailbox0_cluster1 {
+       status = "okay";
+
+       mbox_mcu_r5_0: mbox-mcu-r5-0 {
+               ti,mbox-rx = <0 0 0>;
+               ti,mbox-tx = <1 0 0>;
+       };
+};
+
+&mailbox0_cluster2 {
+       status = "okay";
+
+       mbox_c7x_0: mbox-c7x-0 {
+               ti,mbox-rx = <0 0 0>;
+               ti,mbox-tx = <1 0 0>;
+       };
+};
+
+&mailbox0_cluster3 {
+       status = "okay";
+
+       mbox_main_r5_0: mbox-main-r5-0 {
+               ti,mbox-rx = <0 0 0>;
+               ti,mbox-tx = <1 0 0>;
+       };
+
+       mbox_c7x_1: mbox-c7x-1 {
+               ti,mbox-rx = <2 0 0>;
+               ti,mbox-tx = <3 0 0>;
+       };
+};
+
+/* Timers are used by Remoteproc firmware */
+&main_timer0 {
+       status = "reserved";
+};
+
+&main_timer1 {
+       status = "reserved";
+};
+
+&main_timer2 {
+       status = "reserved";
+};
+
+&wkup_r5fss0 {
+       status = "okay";
+};
+
+&wkup_r5fss0_core0 {
+       mboxes = <&mailbox0_cluster0 &mbox_wkup_r5_0>;
+       memory-region = <&wkup_r5fss0_core0_dma_memory_region>,
+                       <&wkup_r5fss0_core0_memory_region>;
+};
+
+&mcu_r5fss0 {
+       status = "okay";
+};
+
+&mcu_r5fss0_core0 {
+       mboxes = <&mailbox0_cluster1 &mbox_mcu_r5_0>;
+       memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
+                       <&mcu_r5fss0_core0_memory_region>;
+};
+
+&main_r5fss0 {
+       status = "okay";
+};
+
+&main_r5fss0_core0 {
+       mboxes = <&mailbox0_cluster3 &mbox_main_r5_0>;
+       memory-region = <&main_r5fss0_core0_dma_memory_region>,
+                       <&main_r5fss0_core0_memory_region>;
+};
+
+&c7x_0 {
+       mboxes = <&mailbox0_cluster2 &mbox_c7x_0>;
+       memory-region = <&c7x_0_dma_memory_region>,
+                       <&c7x_0_memory_region>;
+       status = "okay";
+};
+
+&c7x_1 {
+       mboxes = <&mailbox0_cluster3 &mbox_c7x_1>;
+       memory-region = <&c7x_1_dma_memory_region>,
+                       <&c7x_1_memory_region>;
+       status = "okay";
+};