drm/mediatek: Fix wrong dither settings
authorAllen-KH Cheng <allen-kh.cheng@mediatek.com>
Thu, 8 Sep 2022 14:12:05 +0000 (22:12 +0800)
committerChun-Kuang Hu <chunkuang.hu@kernel.org>
Mon, 12 Sep 2022 23:10:08 +0000 (07:10 +0800)
The width and height arguments in the cmdq packet for mtk_dither_config()
are inverted. We fix the incorrect width and height for dither settings
in mtk_dither_config().

Fixes: 73d3724745db ("drm/mediatek: Adjust to the alphabetic order for mediatek-drm")
Co-developed-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Link: https://patchwork.kernel.org/project/linux-mediatek/patch/20220908141205.18256-1-allen-kh.cheng@mediatek.com/
Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c

index 2d72cc5ddaba4fea36ee175d1159ecb39990abf8..6b6d5335c8347bed246d357a6454c35622f5b4e5 100644 (file)
@@ -157,7 +157,7 @@ static void mtk_dither_config(struct device *dev, unsigned int w,
 {
        struct mtk_ddp_comp_dev *priv = dev_get_drvdata(dev);
 
-       mtk_ddp_write(cmdq_pkt, h << 16 | w, &priv->cmdq_reg, priv->regs, DISP_REG_DITHER_SIZE);
+       mtk_ddp_write(cmdq_pkt, w << 16 | h, &priv->cmdq_reg, priv->regs, DISP_REG_DITHER_SIZE);
        mtk_ddp_write(cmdq_pkt, DITHER_RELAY_MODE, &priv->cmdq_reg, priv->regs,
                      DISP_REG_DITHER_CFG);
        mtk_dither_set_common(priv->regs, &priv->cmdq_reg, bpc, DISP_REG_DITHER_CFG,