clk: keystone: syscon-clk: Add support for AM64 specific epwm-tbclk
authorLokesh Vutla <lokeshvutla@ti.com>
Fri, 28 May 2021 04:57:43 +0000 (10:27 +0530)
committerStephen Boyd <sboyd@kernel.org>
Tue, 22 Jun 2021 21:18:26 +0000 (14:18 -0700)
AM64 has 9 instances of EPWM modules. And each instance has a clk to
Timer-Base sub-module that can be controlled by Control module. Update
the driver with all the 9 instance of clocks associated to
ti,am64-epwm-tbclk.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Link: https://lore.kernel.org/r/20210528045743.16537-3-lokeshvutla@ti.com
Reviewed-by: Tero Kristo <kristo@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
drivers/clk/keystone/syscon-clk.c

index 5b3d36462174724fa376bf8a5b1fec11838f5dd3..aae1a4076281943346cd5855de615a037a454d77 100644 (file)
@@ -149,11 +149,28 @@ static const struct ti_syscon_gate_clk_data am654_clk_data[] = {
        { /* Sentinel */ },
 };
 
+static const struct ti_syscon_gate_clk_data am64_clk_data[] = {
+       TI_SYSCON_CLK_GATE("epwm_tbclk0", 0x0, 0),
+       TI_SYSCON_CLK_GATE("epwm_tbclk1", 0x0, 1),
+       TI_SYSCON_CLK_GATE("epwm_tbclk2", 0x0, 2),
+       TI_SYSCON_CLK_GATE("epwm_tbclk3", 0x0, 3),
+       TI_SYSCON_CLK_GATE("epwm_tbclk4", 0x0, 4),
+       TI_SYSCON_CLK_GATE("epwm_tbclk5", 0x0, 5),
+       TI_SYSCON_CLK_GATE("epwm_tbclk6", 0x0, 6),
+       TI_SYSCON_CLK_GATE("epwm_tbclk7", 0x0, 7),
+       TI_SYSCON_CLK_GATE("epwm_tbclk8", 0x0, 8),
+       { /* Sentinel */ },
+};
+
 static const struct of_device_id ti_syscon_gate_clk_ids[] = {
        {
                .compatible = "ti,am654-ehrpwm-tbclk",
                .data = &am654_clk_data,
        },
+       {
+               .compatible = "ti,am64-epwm-tbclk",
+               .data = &am64_clk_data,
+       },
        { }
 };
 MODULE_DEVICE_TABLE(of, ti_syscon_gate_clk_ids);