OMAP2PLUS: clocks: Align DSS clock names and roles
authorSumit Semwal <sumit.semwal@ti.com>
Mon, 31 Jan 2011 16:27:43 +0000 (16:27 +0000)
committerTomi Valkeinen <tomi.valkeinen@ti.com>
Fri, 11 Mar 2011 13:46:22 +0000 (15:46 +0200)
Currently, clock database has <dev, clock-name> tuples for DSS2. Because of
this, the clock names are different across different OMAP platforms.

This patch aligns the DSS2 clock names and roles across OMAP 2420, 2430, 3xxx,
44xx platforms in the clock databases, hwmod databases for opt-clocks, and DSS
clock handling.

This ensures that clk_get/put/enable/disable APIs in DSS can use uniform role
names.

Signed-off-by: Sumit Semwal <sumit.semwal@ti.com>
Acked-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
arch/arm/mach-omap2/clock2420_data.c
arch/arm/mach-omap2/clock2430_data.c
arch/arm/mach-omap2/clock3xxx_data.c
arch/arm/mach-omap2/clock44xx_data.c
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
drivers/video/omap2/dss/dss.c

index 9ece62a44a3f6b45a69aa60a6f7939fa48592744..26d89d5827c8484620bd0f3d19139f4bf4d9e657 100644 (file)
@@ -1787,9 +1787,9 @@ static struct omap_clk omap2420_clks[] = {
        CLK(NULL,       "gfx_ick",      &gfx_ick,       CK_242X),
        /* DSS domain clocks */
        CLK("omapdss_dss",      "ick",          &dss_ick,       CK_242X),
-       CLK("omapdss_dss",      "dss1_fck",     &dss1_fck,      CK_242X),
-       CLK("omapdss_dss",      "dss2_fck",     &dss2_fck,      CK_242X),
-       CLK("omapdss_dss",      "tv_fck",       &dss_54m_fck,   CK_242X),
+       CLK("omapdss_dss",      "fck",          &dss1_fck,      CK_242X),
+       CLK("omapdss_dss",      "sys_clk",      &dss2_fck,      CK_242X),
+       CLK("omapdss_dss",      "tv_clk",       &dss_54m_fck,   CK_242X),
        /* L3 domain clocks */
        CLK(NULL,       "core_l3_ck",   &core_l3_ck,    CK_242X),
        CLK(NULL,       "ssi_fck",      &ssi_ssr_sst_fck, CK_242X),
index 61006ae7eac42649b580d20f0f27c8153b0f7594..0bfe4872b02b742981e9684a2eb9cb0eecbebcc4 100644 (file)
@@ -1891,9 +1891,9 @@ static struct omap_clk omap2430_clks[] = {
        CLK(NULL,       "mdm_osc_ck",   &mdm_osc_ck,    CK_243X),
        /* DSS domain clocks */
        CLK("omapdss_dss",      "ick",          &dss_ick,       CK_243X),
-       CLK("omapdss_dss",      "dss1_fck",     &dss1_fck,      CK_243X),
-       CLK("omapdss_dss",      "dss2_fck",     &dss2_fck,      CK_243X),
-       CLK("omapdss_dss",      "tv_fck",       &dss_54m_fck,   CK_243X),
+       CLK("omapdss_dss",      "fck",          &dss1_fck,      CK_243X),
+       CLK("omapdss_dss",      "sys_clk",      &dss2_fck,      CK_243X),
+       CLK("omapdss_dss",      "tv_clk",       &dss_54m_fck,   CK_243X),
        /* L3 domain clocks */
        CLK(NULL,       "core_l3_ck",   &core_l3_ck,    CK_243X),
        CLK(NULL,       "ssi_fck",      &ssi_ssr_sst_fck, CK_243X),
index 2e47d16fce77a712c9e1a5812d150614fb5de29d..427f6c8d158532cfa79d1acf4806091af44e1a9c 100644 (file)
@@ -3357,11 +3357,11 @@ static struct omap_clk omap3xxx_clks[] = {
        CLK("omap_rng", "ick",          &rng_ick,       CK_34XX | CK_36XX),
        CLK(NULL,       "sha11_ick",    &sha11_ick,     CK_34XX | CK_36XX),
        CLK(NULL,       "des1_ick",     &des1_ick,      CK_34XX | CK_36XX),
-       CLK("omapdss_dss",      "dss1_fck",     &dss1_alwon_fck_3430es1, CK_3430ES1),
-       CLK("omapdss_dss",      "dss1_fck",     &dss1_alwon_fck_3430es2, CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
-       CLK("omapdss_dss",      "tv_fck",       &dss_tv_fck,    CK_3XXX),
-       CLK("omapdss_dss",      "video_fck",    &dss_96m_fck,   CK_3XXX),
-       CLK("omapdss_dss",      "dss2_fck",     &dss2_alwon_fck, CK_3XXX),
+       CLK("omapdss_dss",      "fck",          &dss1_alwon_fck_3430es1, CK_3430ES1),
+       CLK("omapdss_dss",      "fck",          &dss1_alwon_fck_3430es2, CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
+       CLK("omapdss_dss",      "tv_clk",       &dss_tv_fck,    CK_3XXX),
+       CLK("omapdss_dss",      "video_clk",    &dss_96m_fck,   CK_3XXX),
+       CLK("omapdss_dss",      "sys_clk",      &dss2_alwon_fck, CK_3XXX),
        CLK("omapdss_dss",      "ick",          &dss_ick_3430es1,       CK_3430ES1),
        CLK("omapdss_dss",      "ick",          &dss_ick_3430es2,       CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
        CLK(NULL,       "cam_mclk",     &cam_mclk,      CK_34XX | CK_36XX),
index fdbc0426b6f4e1681de022bbf277012608a55615..6ba69b1158e6426836d3b5030c100bac7550e591 100644 (file)
@@ -3106,11 +3106,11 @@ static struct omap_clk omap44xx_clks[] = {
        CLK(NULL,       "dmic_sync_mux_ck",             &dmic_sync_mux_ck,      CK_443X),
        CLK(NULL,       "dmic_fck",                     &dmic_fck,      CK_443X),
        CLK(NULL,       "dsp_fck",                      &dsp_fck,       CK_443X),
-       CLK(NULL,       "dss_sys_clk",                  &dss_sys_clk,   CK_443X),
-       CLK(NULL,       "dss_tv_clk",                   &dss_tv_clk,    CK_443X),
-       CLK(NULL,       "dss_dss_clk",                  &dss_dss_clk,   CK_443X),
-       CLK(NULL,       "dss_48mhz_clk",                &dss_48mhz_clk, CK_443X),
-       CLK(NULL,       "dss_fck",                      &dss_fck,       CK_443X),
+       CLK("omapdss_dss",      "sys_clk",                      &dss_sys_clk,   CK_443X),
+       CLK("omapdss_dss",      "tv_clk",                       &dss_tv_clk,    CK_443X),
+       CLK("omapdss_dss",      "dss_clk",                      &dss_dss_clk,   CK_443X),
+       CLK("omapdss_dss",      "video_clk",                    &dss_48mhz_clk, CK_443X),
+       CLK("omapdss_dss",      "fck",                          &dss_fck,       CK_443X),
        CLK(NULL,       "efuse_ctrl_cust_fck",          &efuse_ctrl_cust_fck,   CK_443X),
        CLK(NULL,       "emif1_fck",                    &emif1_fck,     CK_443X),
        CLK(NULL,       "emif2_fck",                    &emif2_fck,     CK_443X),
index c4ca005f8bb51c935940a5b1d2b79d9d392835cb..4ed48cab06fe28fb3e60d6e3e5cdeaa67d8e7563 100644 (file)
@@ -1571,7 +1571,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_slaves[] = {
 
 static struct omap_hwmod_opt_clk dss_opt_clks[] = {
        { .role = "tv_clk", .clk = "dss_tv_fck" },
-       { .role = "dssclk", .clk = "dss_96m_fck" },
+       { .role = "video_clk", .clk = "dss_96m_fck" },
        { .role = "sys_clk", .clk = "dss2_alwon_fck" },
 };
 
index a00733d6436a550146ce9d221d71e210a902e66c..56d37bfefd4d894c923585ee68bcd4ea6e3f48b4 100644 (file)
@@ -759,19 +759,19 @@ static int dss_get_clocks(void)
        if (r)
                goto err;
 
-       r = dss_get_clock(&dss.dss1_fck, "dss1_fck");
+       r = dss_get_clock(&dss.dss1_fck, "fck");
        if (r)
                goto err;
 
-       r = dss_get_clock(&dss.dss2_fck, "dss2_fck");
+       r = dss_get_clock(&dss.dss2_fck, "sys_clk");
        if (r)
                goto err;
 
-       r = dss_get_clock(&dss.dss_54m_fck, "tv_fck");
+       r = dss_get_clock(&dss.dss_54m_fck, "tv_clk");
        if (r)
                goto err;
 
-       r = dss_get_clock(&dss.dss_96m_fck, "video_fck");
+       r = dss_get_clock(&dss.dss_96m_fck, "video_clk");
        if (r)
                goto err;