arm64: dts: imx8mp-venice-gw74xx: add WiFi/BT module support

The GW74xx supports an on-board Laird Connectivity Sterling LWB5+ module
which uses a Cypress CYW4373W chip to provide 1x1 802.11 a/b/g/n/ac +
Bluetooth 5.2.

Add the proper device-tree nodes for it.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts
index dcb7b01fc9fa978014329d6e24b84ceef373e4c6..169c0b9229077493230958b7a1a3553244dd79ec 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts
@@ -135,10 +135,10 @@
                compatible = "regulator-fixed";
                regulator-name = "wl";
                gpio = <&gpio3 9 GPIO_ACTIVE_HIGH>;
-               startup-delay-us = <100>;
+               startup-delay-us = <70000>;
                enable-active-high;
-               regulator-min-microvolt = <1800000>;
-               regulator-max-microvolt = <1800000>;
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
        };
 };
 
@@ -572,6 +572,21 @@
        status = "okay";
 };
 
+/* bluetooth HCI */
+&uart3 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_uart3>, <&pinctrl_uart3_gpio>;
+       cts-gpios = <&gpio3 21 GPIO_ACTIVE_LOW>;
+       rts-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>;
+       uart-has-rtscts;
+       status = "okay";
+
+       bluetooth {
+               compatible = "brcm,bcm4330-bt";
+               shutdown-gpios = <&gpio3 8 GPIO_ACTIVE_HIGH>;
+       };
+};
+
 &uart4 {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_uart4>;
@@ -627,6 +642,25 @@
        status = "okay";
 };
 
+/* SDIO WiFi */
+&usdhc1 {
+       pinctrl-names = "default", "state_100mhz", "state_200mhz";
+       pinctrl-0 = <&pinctrl_usdhc1>;
+       pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
+       pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
+       bus-width = <4>;
+       non-removable;
+       vmmc-supply = <&reg_wifi_en>;
+       #address-cells = <1>;
+       #size-cells = <0>;
+       status = "okay";
+
+       wifi@0 {
+               compatible = "cypress,cyw4373-fmac";
+               reg = <0>;
+       };
+};
+
 /* eMMC */
 &usdhc3 {
        assigned-clocks = <&clk IMX8MP_CLK_USDHC3>;
@@ -876,6 +910,28 @@
                >;
        };
 
+       pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
+               fsl,pins = <
+                       MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK        0x194
+                       MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD        0x1d4
+                       MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0    0x1d4
+                       MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1    0x1d4
+                       MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2    0x1d4
+                       MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3    0x1d4
+               >;
+       };
+
+       pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {
+               fsl,pins = <
+                       MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK        0x196
+                       MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD        0x1d6
+                       MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0    0x1d6
+                       MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1    0x1d6
+                       MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2    0x1d6
+                       MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3    0x1d6
+               >;
+       };
+
        pinctrl_usdhc3: usdhc3grp {
                fsl,pins = <
                        MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK      0x190