arm64: dts: renesas: Add IOMMU related properties into PCIe host nodes
authorYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Wed, 10 May 2023 09:03:58 +0000 (18:03 +0900)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Fri, 2 Jun 2023 09:30:46 +0000 (11:30 +0200)
Add iommu-map and iommu-map-mask properties to the PCIe host nodes.
Note that iommu-map-mask should be zero because the IPMMU assigns
one micro TLB ID only, to the PCIe host.

Also change the dma-ranges arguments for IOMMU.  Note that dma-ranges
can be used if the IOMMU is disabled.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230510090358.261266-1-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
arch/arm64/boot/dts/renesas/r8a774a1.dtsi
arch/arm64/boot/dts/renesas/r8a774b1.dtsi
arch/arm64/boot/dts/renesas/r8a774c0.dtsi
arch/arm64/boot/dts/renesas/r8a774e1.dtsi
arch/arm64/boot/dts/renesas/r8a77951.dtsi
arch/arm64/boot/dts/renesas/r8a77960.dtsi
arch/arm64/boot/dts/renesas/r8a77961.dtsi
arch/arm64/boot/dts/renesas/r8a77965.dtsi
arch/arm64/boot/dts/renesas/r8a77980.dtsi
arch/arm64/boot/dts/renesas/r8a77990.dtsi

index c21b78685123460b790a0395e8475cceea526605..9065dc243428f128bc65c4b4ce3d6f8d976d9973 100644 (file)
                                 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
                                 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
                                 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
-                       /* Map all possible DDR as inbound ranges */
-                       dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
+                       /* Map all possible DDR/IOMMU as inbound ranges */
+                       dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
                        interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
                                <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
                                <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
                        clock-names = "pcie", "pcie_bus";
                        power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
                        resets = <&cpg 319>;
+                       iommu-map = <0 &ipmmu_hc 0 1>;
+                       iommu-map-mask = <0>;
                        status = "disabled";
                };
 
                                 <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>,
                                 <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>,
                                 <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
-                       /* Map all possible DDR as inbound ranges */
-                       dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
+                       /* Map all possible DDR/IOMMU as inbound ranges */
+                       dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
                        interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
                                <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
                                <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
                        clock-names = "pcie", "pcie_bus";
                        power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
                        resets = <&cpg 318>;
+                       iommu-map = <0 &ipmmu_hc 1 1>;
+                       iommu-map-mask = <0>;
                        status = "disabled";
                };
 
index 82216ce7a92a908907ba2448252eb285c788a480..75776decd2186f7dd586328dbba4cf44a5f538a7 100644 (file)
                                 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
                                 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
                                 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
-                       /* Map all possible DDR as inbound ranges */
-                       dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
+                       /* Map all possible DDR/IOMMU as inbound ranges */
+                       dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
                        interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
                        clock-names = "pcie", "pcie_bus";
                        power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
                        resets = <&cpg 319>;
+                       iommu-map = <0 &ipmmu_hc 0 1>;
+                       iommu-map-mask = <0>;
                        status = "disabled";
                };
 
                                 <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>,
                                 <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>,
                                 <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
-                       /* Map all possible DDR as inbound ranges */
-                       dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
+                       /* Map all possible DDR/IOMMU as inbound ranges */
+                       dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
                        interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
                        clock-names = "pcie", "pcie_bus";
                        power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
                        resets = <&cpg 318>;
+                       iommu-map = <0 &ipmmu_hc 1 1>;
+                       iommu-map-mask = <0>;
                        status = "disabled";
                };
 
index 10abfde329d00b4171f8ef22e29a46017b57a762..ad2e87b039acd7ac07b4c544c00f1d8b9993f677 100644 (file)
                                 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
                                 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
                                 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
-                       /* Map all possible DDR as inbound ranges */
-                       dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
+                       /* Map all possible DDR/IOMMU as inbound ranges */
+                       dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
                        interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
                        clock-names = "pcie", "pcie_bus";
                        power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
                        resets = <&cpg 319>;
+                       iommu-map = <0 &ipmmu_hc 0 1>;
+                       iommu-map-mask = <0>;
                        status = "disabled";
                };
 
index 2828e05b40b34ea6614003ecc5151e2730210500..2acf4067ab2f23e2b6624d7d39742ee92cecb1be 100644 (file)
                                 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
                                 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
                                 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
-                       /* Map all possible DDR as inbound ranges */
-                       dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
+                       /* Map all possible DDR/IOMMU as inbound ranges */
+                       dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
                        interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
                        clock-names = "pcie", "pcie_bus";
                        power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
                        resets = <&cpg 319>;
+                       iommu-map = <0 &ipmmu_hc 0 1>;
+                       iommu-map-mask = <0>;
                        status = "disabled";
                };
 
                                 <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>,
                                 <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>,
                                 <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
-                       /* Map all possible DDR as inbound ranges */
-                       dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
+                       /* Map all possible DDR/IOMMU as inbound ranges */
+                       dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
                        interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
                        clock-names = "pcie", "pcie_bus";
                        power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
                        resets = <&cpg 318>;
+                       iommu-map = <0 &ipmmu_hc 1 1>;
+                       iommu-map-mask = <0>;
                        status = "disabled";
                };
 
index 10b91e9733bf6fa174aefc0024f4ff56a17a8ac9..6d15229d25ab101d32436950ecda3f589d7f953b 100644 (file)
                                 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
                                 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
                                 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
-                       /* Map all possible DDR as inbound ranges */
-                       dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
+                       /* Map all possible DDR/IOMMU as inbound ranges */
+                       dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
                        interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
                                <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
                                <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
                        clock-names = "pcie", "pcie_bus";
                        power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
                        resets = <&cpg 319>;
+                       iommu-map = <0 &ipmmu_hc 0 1>;
+                       iommu-map-mask = <0>;
                        status = "disabled";
                };
 
                                 <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>,
                                 <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>,
                                 <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
-                       /* Map all possible DDR as inbound ranges */
-                       dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
+                       /* Map all possible DDR/IOMMU as inbound ranges */
+                       dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
                        interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
                                <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
                                <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
                        clock-names = "pcie", "pcie_bus";
                        power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
                        resets = <&cpg 318>;
+                       iommu-map = <0 &ipmmu_hc 1 1>;
+                       iommu-map-mask = <0>;
                        status = "disabled";
                };
 
index 3ea8572e917f82ddefcfd32e423d09768844ee2a..17062ec506beabd5a27a51b3958eda28577b09bf 100644 (file)
                                 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
                                 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
                                 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
-                       /* Map all possible DDR as inbound ranges */
-                       dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
+                       /* Map all possible DDR/IOMMU as inbound ranges */
+                       dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
                        interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
                                <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
                                <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
                        clock-names = "pcie", "pcie_bus";
                        power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
                        resets = <&cpg 319>;
+                       iommu-map = <0 &ipmmu_hc 0 1>;
+                       iommu-map-mask = <0>;
                        status = "disabled";
                };
 
                                 <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>,
                                 <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>,
                                 <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
-                       /* Map all possible DDR as inbound ranges */
-                       dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
+                       /* Map all possible DDR/IOMMU as inbound ranges */
+                       dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
                        interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
                                <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
                                <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
                        clock-names = "pcie", "pcie_bus";
                        power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
                        resets = <&cpg 318>;
+                       iommu-map = <0 &ipmmu_hc 1 1>;
+                       iommu-map-mask = <0>;
                        status = "disabled";
                };
 
index d52cb0b67d80c6fbef33a278057e1f481114bcff..d3f47da1b62673f5835b73095b559656d7195994 100644 (file)
                                 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
                                 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
                                 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
-                       /* Map all possible DDR as inbound ranges */
-                       dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
+                       /* Map all possible DDR/IOMMU as inbound ranges */
+                       dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
                        interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
                                <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
                                <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
                        clock-names = "pcie", "pcie_bus";
                        power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
                        resets = <&cpg 319>;
+                       iommu-map = <0 &ipmmu_hc 0 1>;
+                       iommu-map-mask = <0>;
                        status = "disabled";
                };
 
                                 <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>,
                                 <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>,
                                 <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
-                       /* Map all possible DDR as inbound ranges */
-                       dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
+                       /* Map all possible DDR/IOMMU as inbound ranges */
+                       dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
                        interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
                                <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
                                <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
                        clock-names = "pcie", "pcie_bus";
                        power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
                        resets = <&cpg 318>;
+                       iommu-map = <0 &ipmmu_hc 1 1>;
+                       iommu-map-mask = <0>;
                        status = "disabled";
                };
 
index 9584115c6b17769be09c9608ab4d4d75cb28cffa..c7582003849135cd0b981a150301e488ead6e864 100644 (file)
                                 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
                                 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
                                 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
-                       /* Map all possible DDR as inbound ranges */
-                       dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
+                       /* Map all possible DDR/IOMMU as inbound ranges */
+                       dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
                        interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
                                <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
                                <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
                        clock-names = "pcie", "pcie_bus";
                        power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
                        resets = <&cpg 319>;
+                       iommu-map = <0 &ipmmu_hc 0 1>;
+                       iommu-map-mask = <0>;
                        status = "disabled";
                };
 
                                 <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>,
                                 <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>,
                                 <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
-                       /* Map all possible DDR as inbound ranges */
-                       dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
+                       /* Map all possible DDR/IOMMU as inbound ranges */
+                       dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
                        interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
                                <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
                                <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
                        clock-names = "pcie", "pcie_bus";
                        power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
                        resets = <&cpg 318>;
+                       iommu-map = <0 &ipmmu_hc 1 1>;
+                       iommu-map-mask = <0>;
                        status = "disabled";
                };
 
index c4ac28a0f7161d000714571af0cb6b44fa01ec21..5ed2daaca1f006493f037e7e84a782161d904219 100644 (file)
                                 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x0200000>,
                                 <0x02000000 0 0x30000000 0 0x30000000 0 0x8000000>,
                                 <0x42000000 0 0x38000000 0 0x38000000 0 0x8000000>;
-                       dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
+                       /* Map all possible DDR/IOMMU as inbound ranges */
+                       dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
                        interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
                        resets = <&cpg 319>;
                        phys = <&pcie_phy>;
                        phy-names = "pcie";
+                       iommu-map = <0 &ipmmu_vi0 5 1>;
+                       iommu-map-mask = <0>;
                        status = "disabled";
                };
 
index 4529e9b57c3312f78f75cf07523a69743826f18b..1be0b99c15ed6680a7a3de0aa2c0e37c332894a3 100644 (file)
                                 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
                                 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
                                 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
-                       /* Map all possible DDR as inbound ranges */
-                       dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
+                       /* Map all possible DDR/IOMMU as inbound ranges */
+                       dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
                        interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
                        clock-names = "pcie", "pcie_bus";
                        power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
                        resets = <&cpg 319>;
+                       iommu-map = <0 &ipmmu_hc 0 1>;
+                       iommu-map-mask = <0>;
                        status = "disabled";
                };