perf/x86/intel: Fix incorrect MSR index calculations in intel_pmu_config_acr()

The MSR offset calculations in intel_pmu_config_acr() are buggy.

To calculate fixed counter MSR addresses in intel_pmu_config_acr(),
the HW counter index "idx" is subtracted by INTEL_PMC_IDX_FIXED.

This leads to the ACR mask value of fixed counters to be incorrectly
saved to the positions of GP counters in acr_cfg_b[], e.g.

For fixed counter 0, its ACR counter mask should be saved to
acr_cfg_b[32], but it's saved to acr_cfg_b[0] incorrectly.

Fix this issue.

[ mingo: Clarified & improved the changelog. ]

Fixes: ec980e4facef ("perf/x86/intel: Support auto counter reload")
Signed-off-by: Dapeng Mi <dapeng1.mi@linux.intel.com>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Reviewed-by: Kan Liang <kan.liang@linux.intel.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Link: https://lore.kernel.org/r/20250529080236.2552247-2-dapeng1.mi@linux.intel.com

diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
index 4662833266302980b5499ea861156f9d9a63f256..741b229f07184e779b97f9749363d860803374ce 100644 (file)
--- a/arch/x86/events/intel/core.c
+++ b/arch/x86/events/intel/core.c
@@ -2900,6 +2900,7 @@ static void intel_pmu_config_acr(int idx, u64 mask, u32 reload)
 {
        struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
        int msr_b, msr_c;
+       int msr_offset;
 
        if (!mask && !cpuc->acr_cfg_b[idx])
                return;
@@ -2907,19 +2908,20 @@ static void intel_pmu_config_acr(int idx, u64 mask, u32 reload)
        if (idx < INTEL_PMC_IDX_FIXED) {
                msr_b = MSR_IA32_PMC_V6_GP0_CFG_B;
                msr_c = MSR_IA32_PMC_V6_GP0_CFG_C;
+               msr_offset = x86_pmu.addr_offset(idx, false);
        } else {
                msr_b = MSR_IA32_PMC_V6_FX0_CFG_B;
                msr_c = MSR_IA32_PMC_V6_FX0_CFG_C;
-               idx -= INTEL_PMC_IDX_FIXED;
+               msr_offset = x86_pmu.addr_offset(idx - INTEL_PMC_IDX_FIXED, false);
        }
 
        if (cpuc->acr_cfg_b[idx] != mask) {
-               wrmsrl(msr_b + x86_pmu.addr_offset(idx, false), mask);
+               wrmsrl(msr_b + msr_offset, mask);
                cpuc->acr_cfg_b[idx] = mask;
        }
        /* Only need to update the reload value when there is a valid config value. */
        if (mask && cpuc->acr_cfg_c[idx] != reload) {
-               wrmsrl(msr_c + x86_pmu.addr_offset(idx, false), reload);
+               wrmsrl(msr_c + msr_offset, reload);
                cpuc->acr_cfg_c[idx] = reload;
        }
 }