int nvkm_gr_ctxsw_resume(struct nvkm_device *);
u32 nvkm_gr_ctxsw_inst(struct nvkm_device *);
-int nv04_gr_new(struct nvkm_device *, int, struct nvkm_gr **);
-int nv10_gr_new(struct nvkm_device *, int, struct nvkm_gr **);
-int nv15_gr_new(struct nvkm_device *, int, struct nvkm_gr **);
-int nv17_gr_new(struct nvkm_device *, int, struct nvkm_gr **);
-int nv20_gr_new(struct nvkm_device *, int, struct nvkm_gr **);
-int nv25_gr_new(struct nvkm_device *, int, struct nvkm_gr **);
-int nv2a_gr_new(struct nvkm_device *, int, struct nvkm_gr **);
-int nv30_gr_new(struct nvkm_device *, int, struct nvkm_gr **);
-int nv34_gr_new(struct nvkm_device *, int, struct nvkm_gr **);
-int nv35_gr_new(struct nvkm_device *, int, struct nvkm_gr **);
-int nv40_gr_new(struct nvkm_device *, int, struct nvkm_gr **);
-int nv44_gr_new(struct nvkm_device *, int, struct nvkm_gr **);
-int nv50_gr_new(struct nvkm_device *, int, struct nvkm_gr **);
-int g84_gr_new(struct nvkm_device *, int, struct nvkm_gr **);
-int gt200_gr_new(struct nvkm_device *, int, struct nvkm_gr **);
-int mcp79_gr_new(struct nvkm_device *, int, struct nvkm_gr **);
-int gt215_gr_new(struct nvkm_device *, int, struct nvkm_gr **);
-int mcp89_gr_new(struct nvkm_device *, int, struct nvkm_gr **);
-int gf100_gr_new(struct nvkm_device *, int, struct nvkm_gr **);
-int gf104_gr_new(struct nvkm_device *, int, struct nvkm_gr **);
-int gf108_gr_new(struct nvkm_device *, int, struct nvkm_gr **);
-int gf110_gr_new(struct nvkm_device *, int, struct nvkm_gr **);
-int gf117_gr_new(struct nvkm_device *, int, struct nvkm_gr **);
-int gf119_gr_new(struct nvkm_device *, int, struct nvkm_gr **);
-int gk104_gr_new(struct nvkm_device *, int, struct nvkm_gr **);
-int gk110_gr_new(struct nvkm_device *, int, struct nvkm_gr **);
-int gk110b_gr_new(struct nvkm_device *, int, struct nvkm_gr **);
-int gk208_gr_new(struct nvkm_device *, int, struct nvkm_gr **);
-int gk20a_gr_new(struct nvkm_device *, int, struct nvkm_gr **);
-int gm107_gr_new(struct nvkm_device *, int, struct nvkm_gr **);
-int gm200_gr_new(struct nvkm_device *, int, struct nvkm_gr **);
-int gm20b_gr_new(struct nvkm_device *, int, struct nvkm_gr **);
-int gp100_gr_new(struct nvkm_device *, int, struct nvkm_gr **);
-int gp102_gr_new(struct nvkm_device *, int, struct nvkm_gr **);
-int gp104_gr_new(struct nvkm_device *, int, struct nvkm_gr **);
-int gp107_gr_new(struct nvkm_device *, int, struct nvkm_gr **);
-int gp108_gr_new(struct nvkm_device *, int, struct nvkm_gr **);
-int gp10b_gr_new(struct nvkm_device *, int, struct nvkm_gr **);
-int gv100_gr_new(struct nvkm_device *, int, struct nvkm_gr **);
-int tu102_gr_new(struct nvkm_device *, int, struct nvkm_gr **);
+int nv04_gr_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_gr **);
+int nv10_gr_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_gr **);
+int nv15_gr_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_gr **);
+int nv17_gr_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_gr **);
+int nv20_gr_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_gr **);
+int nv25_gr_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_gr **);
+int nv2a_gr_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_gr **);
+int nv30_gr_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_gr **);
+int nv34_gr_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_gr **);
+int nv35_gr_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_gr **);
+int nv40_gr_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_gr **);
+int nv44_gr_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_gr **);
+int nv50_gr_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_gr **);
+int g84_gr_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_gr **);
+int gt200_gr_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_gr **);
+int mcp79_gr_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_gr **);
+int gt215_gr_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_gr **);
+int mcp89_gr_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_gr **);
+int gf100_gr_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_gr **);
+int gf104_gr_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_gr **);
+int gf108_gr_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_gr **);
+int gf110_gr_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_gr **);
+int gf117_gr_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_gr **);
+int gf119_gr_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_gr **);
+int gk104_gr_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_gr **);
+int gk110_gr_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_gr **);
+int gk110b_gr_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_gr **);
+int gk208_gr_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_gr **);
+int gk20a_gr_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_gr **);
+int gm107_gr_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_gr **);
+int gm200_gr_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_gr **);
+int gm20b_gr_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_gr **);
+int gp100_gr_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_gr **);
+int gp102_gr_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_gr **);
+int gp104_gr_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_gr **);
+int gp107_gr_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_gr **);
+int gp108_gr_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_gr **);
+int gp10b_gr_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_gr **);
+int gv100_gr_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_gr **);
+int tu102_gr_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_gr **);
#endif
.disp = { 0x00000001, nv04_disp_new },
.dma = { 0x00000001, nv04_dma_new },
.fifo = { 0x00000001, nv04_fifo_new },
- .gr = nv04_gr_new,
+ .gr = { 0x00000001, nv04_gr_new },
.sw = nv04_sw_new,
};
.disp = { 0x00000001, nv04_disp_new },
.dma = { 0x00000001, nv04_dma_new },
.fifo = { 0x00000001, nv04_fifo_new },
- .gr = nv04_gr_new,
+ .gr = { 0x00000001, nv04_gr_new },
.sw = nv04_sw_new,
};
.timer = { 0x00000001, nv04_timer_new },
.disp = { 0x00000001, nv04_disp_new },
.dma = { 0x00000001, nv04_dma_new },
- .gr = nv10_gr_new,
+ .gr = { 0x00000001, nv10_gr_new },
};
static const struct nvkm_device_chip
.disp = { 0x00000001, nv04_disp_new },
.dma = { 0x00000001, nv04_dma_new },
.fifo = { 0x00000001, nv10_fifo_new },
- .gr = nv15_gr_new,
+ .gr = { 0x00000001, nv15_gr_new },
.sw = nv10_sw_new,
};
.disp = { 0x00000001, nv04_disp_new },
.dma = { 0x00000001, nv04_dma_new },
.fifo = { 0x00000001, nv10_fifo_new },
- .gr = nv15_gr_new,
+ .gr = { 0x00000001, nv15_gr_new },
.sw = nv10_sw_new,
};
.disp = { 0x00000001, nv04_disp_new },
.dma = { 0x00000001, nv04_dma_new },
.fifo = { 0x00000001, nv17_fifo_new },
- .gr = nv17_gr_new,
+ .gr = { 0x00000001, nv17_gr_new },
.sw = nv10_sw_new,
};
.disp = { 0x00000001, nv04_disp_new },
.dma = { 0x00000001, nv04_dma_new },
.fifo = { 0x00000001, nv17_fifo_new },
- .gr = nv17_gr_new,
+ .gr = { 0x00000001, nv17_gr_new },
.sw = nv10_sw_new,
};
.disp = { 0x00000001, nv04_disp_new },
.dma = { 0x00000001, nv04_dma_new },
.fifo = { 0x00000001, nv10_fifo_new },
- .gr = nv15_gr_new,
+ .gr = { 0x00000001, nv15_gr_new },
.sw = nv10_sw_new,
};
.disp = { 0x00000001, nv04_disp_new },
.dma = { 0x00000001, nv04_dma_new },
.fifo = { 0x00000001, nv17_fifo_new },
- .gr = nv17_gr_new,
+ .gr = { 0x00000001, nv17_gr_new },
.sw = nv10_sw_new,
};
.disp = { 0x00000001, nv04_disp_new },
.dma = { 0x00000001, nv04_dma_new },
.fifo = { 0x00000001, nv17_fifo_new },
- .gr = nv20_gr_new,
+ .gr = { 0x00000001, nv20_gr_new },
.sw = nv10_sw_new,
};
.disp = { 0x00000001, nv04_disp_new },
.dma = { 0x00000001, nv04_dma_new },
.fifo = { 0x00000001, nv17_fifo_new },
- .gr = nv25_gr_new,
+ .gr = { 0x00000001, nv25_gr_new },
.sw = nv10_sw_new,
};
.disp = { 0x00000001, nv04_disp_new },
.dma = { 0x00000001, nv04_dma_new },
.fifo = { 0x00000001, nv17_fifo_new },
- .gr = nv25_gr_new,
+ .gr = { 0x00000001, nv25_gr_new },
.sw = nv10_sw_new,
};
.disp = { 0x00000001, nv04_disp_new },
.dma = { 0x00000001, nv04_dma_new },
.fifo = { 0x00000001, nv17_fifo_new },
- .gr = nv2a_gr_new,
+ .gr = { 0x00000001, nv2a_gr_new },
.sw = nv10_sw_new,
};
.disp = { 0x00000001, nv04_disp_new },
.dma = { 0x00000001, nv04_dma_new },
.fifo = { 0x00000001, nv17_fifo_new },
- .gr = nv30_gr_new,
+ .gr = { 0x00000001, nv30_gr_new },
.sw = nv10_sw_new,
};
.disp = { 0x00000001, nv04_disp_new },
.dma = { 0x00000001, nv04_dma_new },
.fifo = { 0x00000001, nv17_fifo_new },
- .gr = nv30_gr_new,
+ .gr = { 0x00000001, nv30_gr_new },
.mpeg = nv31_mpeg_new,
.sw = nv10_sw_new,
};
.disp = { 0x00000001, nv04_disp_new },
.dma = { 0x00000001, nv04_dma_new },
.fifo = { 0x00000001, nv17_fifo_new },
- .gr = nv34_gr_new,
+ .gr = { 0x00000001, nv34_gr_new },
.mpeg = nv31_mpeg_new,
.sw = nv10_sw_new,
};
.disp = { 0x00000001, nv04_disp_new },
.dma = { 0x00000001, nv04_dma_new },
.fifo = { 0x00000001, nv17_fifo_new },
- .gr = nv35_gr_new,
+ .gr = { 0x00000001, nv35_gr_new },
.sw = nv10_sw_new,
};
.disp = { 0x00000001, nv04_disp_new },
.dma = { 0x00000001, nv04_dma_new },
.fifo = { 0x00000001, nv17_fifo_new },
- .gr = nv35_gr_new,
+ .gr = { 0x00000001, nv35_gr_new },
.mpeg = nv31_mpeg_new,
.sw = nv10_sw_new,
};
.disp = { 0x00000001, nv04_disp_new },
.dma = { 0x00000001, nv04_dma_new },
.fifo = { 0x00000001, nv40_fifo_new },
- .gr = nv40_gr_new,
+ .gr = { 0x00000001, nv40_gr_new },
.mpeg = nv40_mpeg_new,
.pm = nv40_pm_new,
.sw = nv10_sw_new,
.disp = { 0x00000001, nv04_disp_new },
.dma = { 0x00000001, nv04_dma_new },
.fifo = { 0x00000001, nv40_fifo_new },
- .gr = nv40_gr_new,
+ .gr = { 0x00000001, nv40_gr_new },
.mpeg = nv40_mpeg_new,
.pm = nv40_pm_new,
.sw = nv10_sw_new,
.disp = { 0x00000001, nv04_disp_new },
.dma = { 0x00000001, nv04_dma_new },
.fifo = { 0x00000001, nv40_fifo_new },
- .gr = nv40_gr_new,
+ .gr = { 0x00000001, nv40_gr_new },
.mpeg = nv40_mpeg_new,
.pm = nv40_pm_new,
.sw = nv10_sw_new,
.disp = { 0x00000001, nv04_disp_new },
.dma = { 0x00000001, nv04_dma_new },
.fifo = { 0x00000001, nv40_fifo_new },
- .gr = nv40_gr_new,
+ .gr = { 0x00000001, nv40_gr_new },
.mpeg = nv40_mpeg_new,
.pm = nv40_pm_new,
.sw = nv10_sw_new,
.disp = { 0x00000001, nv04_disp_new },
.dma = { 0x00000001, nv04_dma_new },
.fifo = { 0x00000001, nv40_fifo_new },
- .gr = nv44_gr_new,
+ .gr = { 0x00000001, nv44_gr_new },
.mpeg = nv44_mpeg_new,
.pm = nv40_pm_new,
.sw = nv10_sw_new,
.disp = { 0x00000001, nv04_disp_new },
.dma = { 0x00000001, nv04_dma_new },
.fifo = { 0x00000001, nv40_fifo_new },
- .gr = nv40_gr_new,
+ .gr = { 0x00000001, nv40_gr_new },
.mpeg = nv44_mpeg_new,
.pm = nv40_pm_new,
.sw = nv10_sw_new,
.disp = { 0x00000001, nv04_disp_new },
.dma = { 0x00000001, nv04_dma_new },
.fifo = { 0x00000001, nv40_fifo_new },
- .gr = nv44_gr_new,
+ .gr = { 0x00000001, nv44_gr_new },
.mpeg = nv44_mpeg_new,
.pm = nv40_pm_new,
.sw = nv10_sw_new,
.disp = { 0x00000001, nv04_disp_new },
.dma = { 0x00000001, nv04_dma_new },
.fifo = { 0x00000001, nv40_fifo_new },
- .gr = nv40_gr_new,
+ .gr = { 0x00000001, nv40_gr_new },
.mpeg = nv44_mpeg_new,
.pm = nv40_pm_new,
.sw = nv10_sw_new,
.disp = { 0x00000001, nv04_disp_new },
.dma = { 0x00000001, nv04_dma_new },
.fifo = { 0x00000001, nv40_fifo_new },
- .gr = nv40_gr_new,
+ .gr = { 0x00000001, nv40_gr_new },
.mpeg = nv44_mpeg_new,
.pm = nv40_pm_new,
.sw = nv10_sw_new,
.disp = { 0x00000001, nv04_disp_new },
.dma = { 0x00000001, nv04_dma_new },
.fifo = { 0x00000001, nv40_fifo_new },
- .gr = nv44_gr_new,
+ .gr = { 0x00000001, nv44_gr_new },
.mpeg = nv44_mpeg_new,
.pm = nv40_pm_new,
.sw = nv10_sw_new,
.disp = { 0x00000001, nv04_disp_new },
.dma = { 0x00000001, nv04_dma_new },
.fifo = { 0x00000001, nv40_fifo_new },
- .gr = nv40_gr_new,
+ .gr = { 0x00000001, nv40_gr_new },
.mpeg = nv44_mpeg_new,
.pm = nv40_pm_new,
.sw = nv10_sw_new,
.disp = { 0x00000001, nv04_disp_new },
.dma = { 0x00000001, nv04_dma_new },
.fifo = { 0x00000001, nv40_fifo_new },
- .gr = nv44_gr_new,
+ .gr = { 0x00000001, nv44_gr_new },
.mpeg = nv44_mpeg_new,
.pm = nv40_pm_new,
.sw = nv10_sw_new,
.disp = { 0x00000001, nv04_disp_new },
.dma = { 0x00000001, nv04_dma_new },
.fifo = { 0x00000001, nv40_fifo_new },
- .gr = nv44_gr_new,
+ .gr = { 0x00000001, nv44_gr_new },
.mpeg = nv44_mpeg_new,
.pm = nv40_pm_new,
.sw = nv10_sw_new,
.disp = { 0x00000001, nv50_disp_new },
.dma = { 0x00000001, nv50_dma_new },
.fifo = { 0x00000001, nv50_fifo_new },
- .gr = nv50_gr_new,
+ .gr = { 0x00000001, nv50_gr_new },
.mpeg = nv50_mpeg_new,
.pm = nv50_pm_new,
.sw = nv50_sw_new,
.disp = { 0x00000001, nv04_disp_new },
.dma = { 0x00000001, nv04_dma_new },
.fifo = { 0x00000001, nv40_fifo_new },
- .gr = nv44_gr_new,
+ .gr = { 0x00000001, nv44_gr_new },
.mpeg = nv44_mpeg_new,
.pm = nv40_pm_new,
.sw = nv10_sw_new,
.disp = { 0x00000001, nv04_disp_new },
.dma = { 0x00000001, nv04_dma_new },
.fifo = { 0x00000001, nv40_fifo_new },
- .gr = nv44_gr_new,
+ .gr = { 0x00000001, nv44_gr_new },
.mpeg = nv44_mpeg_new,
.pm = nv40_pm_new,
.sw = nv10_sw_new,
.disp = { 0x00000001, nv04_disp_new },
.dma = { 0x00000001, nv04_dma_new },
.fifo = { 0x00000001, nv40_fifo_new },
- .gr = nv44_gr_new,
+ .gr = { 0x00000001, nv44_gr_new },
.mpeg = nv44_mpeg_new,
.pm = nv40_pm_new,
.sw = nv10_sw_new,
.disp = { 0x00000001, g84_disp_new },
.dma = { 0x00000001, nv50_dma_new },
.fifo = { 0x00000001, g84_fifo_new },
- .gr = g84_gr_new,
+ .gr = { 0x00000001, g84_gr_new },
.mpeg = g84_mpeg_new,
.pm = g84_pm_new,
.sw = nv50_sw_new,
.disp = { 0x00000001, g84_disp_new },
.dma = { 0x00000001, nv50_dma_new },
.fifo = { 0x00000001, g84_fifo_new },
- .gr = g84_gr_new,
+ .gr = { 0x00000001, g84_gr_new },
.mpeg = g84_mpeg_new,
.pm = g84_pm_new,
.sw = nv50_sw_new,
.disp = { 0x00000001, g84_disp_new },
.dma = { 0x00000001, nv50_dma_new },
.fifo = { 0x00000001, g84_fifo_new },
- .gr = g84_gr_new,
+ .gr = { 0x00000001, g84_gr_new },
.mpeg = g84_mpeg_new,
.pm = g84_pm_new,
.sw = nv50_sw_new,
.disp = { 0x00000001, g94_disp_new },
.dma = { 0x00000001, nv50_dma_new },
.fifo = { 0x00000001, g84_fifo_new },
- .gr = g84_gr_new,
+ .gr = { 0x00000001, g84_gr_new },
.mpeg = g84_mpeg_new,
.pm = g84_pm_new,
.sw = nv50_sw_new,
.disp = { 0x00000001, g94_disp_new },
.dma = { 0x00000001, nv50_dma_new },
.fifo = { 0x00000001, g84_fifo_new },
- .gr = g84_gr_new,
+ .gr = { 0x00000001, g84_gr_new },
.mpeg = g84_mpeg_new,
.pm = g84_pm_new,
.sw = nv50_sw_new,
.disp = { 0x00000001, g94_disp_new },
.dma = { 0x00000001, nv50_dma_new },
.fifo = { 0x00000001, g84_fifo_new },
- .gr = g84_gr_new,
+ .gr = { 0x00000001, g84_gr_new },
.mspdec = g98_mspdec_new,
.msppp = g98_msppp_new,
.msvld = g98_msvld_new,
.disp = { 0x00000001, gt200_disp_new },
.dma = { 0x00000001, nv50_dma_new },
.fifo = { 0x00000001, g84_fifo_new },
- .gr = gt200_gr_new,
+ .gr = { 0x00000001, gt200_gr_new },
.mpeg = g84_mpeg_new,
.pm = gt200_pm_new,
.sw = nv50_sw_new,
.disp = { 0x00000001, gt215_disp_new },
.dma = { 0x00000001, nv50_dma_new },
.fifo = { 0x00000001, g84_fifo_new },
- .gr = gt215_gr_new,
+ .gr = { 0x00000001, gt215_gr_new },
.mpeg = g84_mpeg_new,
.mspdec = gt215_mspdec_new,
.msppp = gt215_msppp_new,
.disp = { 0x00000001, gt215_disp_new },
.dma = { 0x00000001, nv50_dma_new },
.fifo = { 0x00000001, g84_fifo_new },
- .gr = gt215_gr_new,
+ .gr = { 0x00000001, gt215_gr_new },
.mspdec = gt215_mspdec_new,
.msppp = gt215_msppp_new,
.msvld = gt215_msvld_new,
.disp = { 0x00000001, gt215_disp_new },
.dma = { 0x00000001, nv50_dma_new },
.fifo = { 0x00000001, g84_fifo_new },
- .gr = gt215_gr_new,
+ .gr = { 0x00000001, gt215_gr_new },
.mspdec = gt215_mspdec_new,
.msppp = gt215_msppp_new,
.msvld = gt215_msvld_new,
.disp = { 0x00000001, mcp77_disp_new },
.dma = { 0x00000001, nv50_dma_new },
.fifo = { 0x00000001, g84_fifo_new },
- .gr = gt200_gr_new,
+ .gr = { 0x00000001, gt200_gr_new },
.mspdec = g98_mspdec_new,
.msppp = g98_msppp_new,
.msvld = g98_msvld_new,
.disp = { 0x00000001, mcp77_disp_new },
.dma = { 0x00000001, nv50_dma_new },
.fifo = { 0x00000001, g84_fifo_new },
- .gr = mcp79_gr_new,
+ .gr = { 0x00000001, mcp79_gr_new },
.mspdec = g98_mspdec_new,
.msppp = g98_msppp_new,
.msvld = g98_msvld_new,
.disp = { 0x00000001, mcp89_disp_new },
.dma = { 0x00000001, nv50_dma_new },
.fifo = { 0x00000001, g84_fifo_new },
- .gr = mcp89_gr_new,
+ .gr = { 0x00000001, mcp89_gr_new },
.mspdec = gt215_mspdec_new,
.msppp = gt215_msppp_new,
.msvld = mcp89_msvld_new,
.disp = { 0x00000001, gt215_disp_new },
.dma = { 0x00000001, gf100_dma_new },
.fifo = { 0x00000001, gf100_fifo_new },
- .gr = gf100_gr_new,
+ .gr = { 0x00000001, gf100_gr_new },
.mspdec = gf100_mspdec_new,
.msppp = gf100_msppp_new,
.msvld = gf100_msvld_new,
.disp = { 0x00000001, gt215_disp_new },
.dma = { 0x00000001, gf100_dma_new },
.fifo = { 0x00000001, gf100_fifo_new },
- .gr = gf108_gr_new,
+ .gr = { 0x00000001, gf108_gr_new },
.mspdec = gf100_mspdec_new,
.msppp = gf100_msppp_new,
.msvld = gf100_msvld_new,
.disp = { 0x00000001, gt215_disp_new },
.dma = { 0x00000001, gf100_dma_new },
.fifo = { 0x00000001, gf100_fifo_new },
- .gr = gf104_gr_new,
+ .gr = { 0x00000001, gf104_gr_new },
.mspdec = gf100_mspdec_new,
.msppp = gf100_msppp_new,
.msvld = gf100_msvld_new,
.disp = { 0x00000001, gt215_disp_new },
.dma = { 0x00000001, gf100_dma_new },
.fifo = { 0x00000001, gf100_fifo_new },
- .gr = gf104_gr_new,
+ .gr = { 0x00000001, gf104_gr_new },
.mspdec = gf100_mspdec_new,
.msppp = gf100_msppp_new,
.msvld = gf100_msvld_new,
.disp = { 0x00000001, gt215_disp_new },
.dma = { 0x00000001, gf100_dma_new },
.fifo = { 0x00000001, gf100_fifo_new },
- .gr = gf110_gr_new,
+ .gr = { 0x00000001, gf110_gr_new },
.mspdec = gf100_mspdec_new,
.msppp = gf100_msppp_new,
.msvld = gf100_msvld_new,
.disp = { 0x00000001, gt215_disp_new },
.dma = { 0x00000001, gf100_dma_new },
.fifo = { 0x00000001, gf100_fifo_new },
- .gr = gf104_gr_new,
+ .gr = { 0x00000001, gf104_gr_new },
.mspdec = gf100_mspdec_new,
.msppp = gf100_msppp_new,
.msvld = gf100_msvld_new,
.disp = { 0x00000001, gt215_disp_new },
.dma = { 0x00000001, gf100_dma_new },
.fifo = { 0x00000001, gf100_fifo_new },
- .gr = gf104_gr_new,
+ .gr = { 0x00000001, gf104_gr_new },
.mspdec = gf100_mspdec_new,
.msppp = gf100_msppp_new,
.msvld = gf100_msvld_new,
.disp = { 0x00000001, gf119_disp_new },
.dma = { 0x00000001, gf119_dma_new },
.fifo = { 0x00000001, gf100_fifo_new },
- .gr = gf117_gr_new,
+ .gr = { 0x00000001, gf117_gr_new },
.mspdec = gf100_mspdec_new,
.msppp = gf100_msppp_new,
.msvld = gf100_msvld_new,
.disp = { 0x00000001, gf119_disp_new },
.dma = { 0x00000001, gf119_dma_new },
.fifo = { 0x00000001, gf100_fifo_new },
- .gr = gf119_gr_new,
+ .gr = { 0x00000001, gf119_gr_new },
.mspdec = gf100_mspdec_new,
.msppp = gf100_msppp_new,
.msvld = gf100_msvld_new,
.disp = { 0x00000001, gk104_disp_new },
.dma = { 0x00000001, gf119_dma_new },
.fifo = { 0x00000001, gk104_fifo_new },
- .gr = gk104_gr_new,
+ .gr = { 0x00000001, gk104_gr_new },
.mspdec = gk104_mspdec_new,
.msppp = gf100_msppp_new,
.msvld = gk104_msvld_new,
.disp = { 0x00000001, gk104_disp_new },
.dma = { 0x00000001, gf119_dma_new },
.fifo = { 0x00000001, gk104_fifo_new },
- .gr = gk104_gr_new,
+ .gr = { 0x00000001, gk104_gr_new },
.mspdec = gk104_mspdec_new,
.msppp = gf100_msppp_new,
.msvld = gk104_msvld_new,
.disp = { 0x00000001, gk104_disp_new },
.dma = { 0x00000001, gf119_dma_new },
.fifo = { 0x00000001, gk104_fifo_new },
- .gr = gk104_gr_new,
+ .gr = { 0x00000001, gk104_gr_new },
.mspdec = gk104_mspdec_new,
.msppp = gf100_msppp_new,
.msvld = gk104_msvld_new,
.ce = { 0x00000004, gk104_ce_new },
.dma = { 0x00000001, gf119_dma_new },
.fifo = { 0x00000001, gk20a_fifo_new },
- .gr = gk20a_gr_new,
+ .gr = { 0x00000001, gk20a_gr_new },
.pm = gk104_pm_new,
.sw = gf100_sw_new,
};
.disp = { 0x00000001, gk110_disp_new },
.dma = { 0x00000001, gf119_dma_new },
.fifo = { 0x00000001, gk110_fifo_new },
- .gr = gk110_gr_new,
+ .gr = { 0x00000001, gk110_gr_new },
.mspdec = gk104_mspdec_new,
.msppp = gf100_msppp_new,
.msvld = gk104_msvld_new,
.disp = { 0x00000001, gk110_disp_new },
.dma = { 0x00000001, gf119_dma_new },
.fifo = { 0x00000001, gk110_fifo_new },
- .gr = gk110b_gr_new,
+ .gr = { 0x00000001, gk110b_gr_new },
.mspdec = gk104_mspdec_new,
.msppp = gf100_msppp_new,
.msvld = gk104_msvld_new,
.disp = { 0x00000001, gk110_disp_new },
.dma = { 0x00000001, gf119_dma_new },
.fifo = { 0x00000001, gk208_fifo_new },
- .gr = gk208_gr_new,
+ .gr = { 0x00000001, gk208_gr_new },
.mspdec = gk104_mspdec_new,
.msppp = gf100_msppp_new,
.msvld = gk104_msvld_new,
.disp = { 0x00000001, gk110_disp_new },
.dma = { 0x00000001, gf119_dma_new },
.fifo = { 0x00000001, gk208_fifo_new },
- .gr = gk208_gr_new,
+ .gr = { 0x00000001, gk208_gr_new },
.mspdec = gk104_mspdec_new,
.msppp = gf100_msppp_new,
.msvld = gk104_msvld_new,
.disp = { 0x00000001, gm107_disp_new },
.dma = { 0x00000001, gf119_dma_new },
.fifo = { 0x00000001, gm107_fifo_new },
- .gr = gm107_gr_new,
+ .gr = { 0x00000001, gm107_gr_new },
.nvdec[0] = gm107_nvdec_new,
.nvenc[0] = gm107_nvenc_new,
.sw = gf100_sw_new,
.disp = { 0x00000001, gm107_disp_new },
.dma = { 0x00000001, gf119_dma_new },
.fifo = { 0x00000001, gm107_fifo_new },
- .gr = gm107_gr_new,
+ .gr = { 0x00000001, gm107_gr_new },
.sw = gf100_sw_new,
};
.disp = { 0x00000001, gm200_disp_new },
.dma = { 0x00000001, gf119_dma_new },
.fifo = { 0x00000001, gm200_fifo_new },
- .gr = gm200_gr_new,
+ .gr = { 0x00000001, gm200_gr_new },
.nvdec[0] = gm107_nvdec_new,
.nvenc[0] = gm107_nvenc_new,
.nvenc[1] = gm107_nvenc_new,
.disp = { 0x00000001, gm200_disp_new },
.dma = { 0x00000001, gf119_dma_new },
.fifo = { 0x00000001, gm200_fifo_new },
- .gr = gm200_gr_new,
+ .gr = { 0x00000001, gm200_gr_new },
.nvdec[0] = gm107_nvdec_new,
.nvenc[0] = gm107_nvenc_new,
.nvenc[1] = gm107_nvenc_new,
.disp = { 0x00000001, gm200_disp_new },
.dma = { 0x00000001, gf119_dma_new },
.fifo = { 0x00000001, gm200_fifo_new },
- .gr = gm200_gr_new,
+ .gr = { 0x00000001, gm200_gr_new },
.nvdec[0] = gm107_nvdec_new,
.nvenc[0] = gm107_nvenc_new,
.sw = gf100_sw_new,
.ce = { 0x00000004, gm200_ce_new },
.dma = { 0x00000001, gf119_dma_new },
.fifo = { 0x00000001, gm20b_fifo_new },
- .gr = gm20b_gr_new,
+ .gr = { 0x00000001, gm20b_gr_new },
.sw = gf100_sw_new,
};
.dma = { 0x00000001, gf119_dma_new },
.disp = { 0x00000001, gp100_disp_new },
.fifo = { 0x00000001, gp100_fifo_new },
- .gr = gp100_gr_new,
+ .gr = { 0x00000001, gp100_gr_new },
.nvdec[0] = gm107_nvdec_new,
.nvenc[0] = gm107_nvenc_new,
.nvenc[1] = gm107_nvenc_new,
.disp = { 0x00000001, gp102_disp_new },
.dma = { 0x00000001, gf119_dma_new },
.fifo = { 0x00000001, gp100_fifo_new },
- .gr = gp102_gr_new,
+ .gr = { 0x00000001, gp102_gr_new },
.nvdec[0] = gm107_nvdec_new,
.nvenc[0] = gm107_nvenc_new,
.nvenc[1] = gm107_nvenc_new,
.disp = { 0x00000001, gp102_disp_new },
.dma = { 0x00000001, gf119_dma_new },
.fifo = { 0x00000001, gp100_fifo_new },
- .gr = gp104_gr_new,
+ .gr = { 0x00000001, gp104_gr_new },
.nvdec[0] = gm107_nvdec_new,
.nvenc[0] = gm107_nvenc_new,
.nvenc[1] = gm107_nvenc_new,
.disp = { 0x00000001, gp102_disp_new },
.dma = { 0x00000001, gf119_dma_new },
.fifo = { 0x00000001, gp100_fifo_new },
- .gr = gp104_gr_new,
+ .gr = { 0x00000001, gp104_gr_new },
.nvdec[0] = gm107_nvdec_new,
.nvenc[0] = gm107_nvenc_new,
.sec2 = gp102_sec2_new,
.disp = { 0x00000001, gp102_disp_new },
.dma = { 0x00000001, gf119_dma_new },
.fifo = { 0x00000001, gp100_fifo_new },
- .gr = gp107_gr_new,
+ .gr = { 0x00000001, gp107_gr_new },
.nvdec[0] = gm107_nvdec_new,
.nvenc[0] = gm107_nvenc_new,
.nvenc[1] = gm107_nvenc_new,
.disp = { 0x00000001, gp102_disp_new },
.dma = { 0x00000001, gf119_dma_new },
.fifo = { 0x00000001, gp100_fifo_new },
- .gr = gp108_gr_new,
+ .gr = { 0x00000001, gp108_gr_new },
.nvdec[0] = gm107_nvdec_new,
.sec2 = gp108_sec2_new,
.sw = gf100_sw_new,
.ce = { 0x00000001, gp100_ce_new },
.dma = { 0x00000001, gf119_dma_new },
.fifo = { 0x00000001, gp10b_fifo_new },
- .gr = gp10b_gr_new,
+ .gr = { 0x00000001, gp10b_gr_new },
.sw = gf100_sw_new,
};
.disp = { 0x00000001, gv100_disp_new },
.dma = { 0x00000001, gv100_dma_new },
.fifo = { 0x00000001, gv100_fifo_new },
- .gr = gv100_gr_new,
+ .gr = { 0x00000001, gv100_gr_new },
.nvdec[0] = gm107_nvdec_new,
.nvenc[0] = gm107_nvenc_new,
.nvenc[1] = gm107_nvenc_new,
.disp = { 0x00000001, tu102_disp_new },
.dma = { 0x00000001, gv100_dma_new },
.fifo = { 0x00000001, tu102_fifo_new },
- .gr = tu102_gr_new,
+ .gr = { 0x00000001, tu102_gr_new },
.nvdec[0] = gm107_nvdec_new,
.nvenc[0] = gm107_nvenc_new,
.sec2 = tu102_sec2_new,
.disp = { 0x00000001, tu102_disp_new },
.dma = { 0x00000001, gv100_dma_new },
.fifo = { 0x00000001, tu102_fifo_new },
- .gr = tu102_gr_new,
+ .gr = { 0x00000001, tu102_gr_new },
.nvdec[0] = gm107_nvdec_new,
.nvdec[1] = gm107_nvdec_new,
.nvenc[0] = gm107_nvenc_new,
.disp = { 0x00000001, tu102_disp_new },
.dma = { 0x00000001, gv100_dma_new },
.fifo = { 0x00000001, tu102_fifo_new },
- .gr = tu102_gr_new,
+ .gr = { 0x00000001, tu102_gr_new },
.nvdec[0] = gm107_nvdec_new,
.nvdec[1] = gm107_nvdec_new,
.nvdec[2] = gm107_nvdec_new,
.disp = { 0x00000001, tu102_disp_new },
.dma = { 0x00000001, gv100_dma_new },
.fifo = { 0x00000001, tu102_fifo_new },
- .gr = tu102_gr_new,
+ .gr = { 0x00000001, tu102_gr_new },
.nvdec[0] = gm107_nvdec_new,
.nvenc[0] = gm107_nvenc_new,
.sec2 = tu102_sec2_new,
.disp = { 0x00000001, tu102_disp_new },
.dma = { 0x00000001, gv100_dma_new },
.fifo = { 0x00000001, tu102_fifo_new },
- .gr = tu102_gr_new,
+ .gr = { 0x00000001, tu102_gr_new },
.nvdec[0] = gm107_nvdec_new,
.nvenc[0] = gm107_nvenc_new,
.sec2 = tu102_sec2_new,
#include <core/layout.h>
#undef NVKM_LAYOUT_INST
#undef NVKM_LAYOUT_ONCE
- _(NVKM_ENGINE_GR , gr);
_(NVKM_ENGINE_IFB , ifb);
_(NVKM_ENGINE_ME , me);
_(NVKM_ENGINE_MPEG , mpeg);