drm/i915: move pipestat_irq_mask to display substruct

The info is related to display, and should be placed under
i915->display.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Acked-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/2e2f1c9576126927ea63a54639077c01d44ad5b6.1712599670.git.jani.nikula@intel.com

diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h b/drivers/gpu/drm/i915/display/intel_display_core.h
index 7a70b162b015eb27081539933a33ed997a31bc70..db9b6492758e5c8102ea926086a672c6777e6bc8 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_display_core.h
+++ b/drivers/gpu/drm/i915/display/intel_display_core.h
@@ -454,6 +454,7 @@ struct intel_display {
                u8 vblank_enabled;
 
                u32 de_irq_mask[I915_MAX_PIPES];
+               u32 pipestat_irq_mask[I915_MAX_PIPES];
        } irq;
 
        struct {

diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
index 9b9548ae9797b2f4554ea603045f6c7edf578940..c337e059754115d3b9e7be2d8658533cbc28409b 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_display_irq.c
+++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
@@ -180,7 +180,7 @@ void ibx_disable_display_interrupt(struct drm_i915_private *i915, u32 bits)
 u32 i915_pipestat_enable_mask(struct drm_i915_private *dev_priv,
                              enum pipe pipe)
 {
-       u32 status_mask = dev_priv->pipestat_irq_mask[pipe];
+       u32 status_mask = dev_priv->display.irq.pipestat_irq_mask[pipe];
        u32 enable_mask = status_mask << 16;
 
        lockdep_assert_held(&dev_priv->irq_lock);
@@ -234,10 +234,10 @@ void i915_enable_pipestat(struct drm_i915_private *dev_priv,
        lockdep_assert_held(&dev_priv->irq_lock);
        drm_WARN_ON(&dev_priv->drm, !intel_irqs_enabled(dev_priv));
 
-       if ((dev_priv->pipestat_irq_mask[pipe] & status_mask) == status_mask)
+       if ((dev_priv->display.irq.pipestat_irq_mask[pipe] & status_mask) == status_mask)
                return;
 
-       dev_priv->pipestat_irq_mask[pipe] |= status_mask;
+       dev_priv->display.irq.pipestat_irq_mask[pipe] |= status_mask;
        enable_mask = i915_pipestat_enable_mask(dev_priv, pipe);
 
        intel_uncore_write(&dev_priv->uncore, reg, enable_mask | status_mask);
@@ -257,10 +257,10 @@ void i915_disable_pipestat(struct drm_i915_private *dev_priv,
        lockdep_assert_held(&dev_priv->irq_lock);
        drm_WARN_ON(&dev_priv->drm, !intel_irqs_enabled(dev_priv));
 
-       if ((dev_priv->pipestat_irq_mask[pipe] & status_mask) == 0)
+       if ((dev_priv->display.irq.pipestat_irq_mask[pipe] & status_mask) == 0)
                return;
 
-       dev_priv->pipestat_irq_mask[pipe] &= ~status_mask;
+       dev_priv->display.irq.pipestat_irq_mask[pipe] &= ~status_mask;
        enable_mask = i915_pipestat_enable_mask(dev_priv, pipe);
 
        intel_uncore_write(&dev_priv->uncore, reg, enable_mask | status_mask);
@@ -402,7 +402,7 @@ void i9xx_pipestat_irq_reset(struct drm_i915_private *dev_priv)
                                   PIPESTAT_INT_STATUS_MASK |
                                   PIPE_FIFO_UNDERRUN_STATUS);
 
-               dev_priv->pipestat_irq_mask[pipe] = 0;
+               dev_priv->display.irq.pipestat_irq_mask[pipe] = 0;
        }
 }
 
@@ -446,7 +446,7 @@ void i9xx_pipestat_irq_ack(struct drm_i915_private *dev_priv,
                        break;
                }
                if (iir & iir_bit)
-                       status_mask |= dev_priv->pipestat_irq_mask[pipe];
+                       status_mask |= dev_priv->display.irq.pipestat_irq_mask[pipe];
 
                if (!status_mask)
                        continue;

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 41add82ca36987e9c3bbcc7cf8f781289435f014..ee0d7d5f135dac86a6e303a2be975ef99aa2c8b4 100644 (file)
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -241,7 +241,6 @@ struct drm_i915_private {
 
        /** Cached value of IMR to avoid reads in updating the bitfield */
        u32 irq_mask;
-       u32 pipestat_irq_mask[I915_MAX_PIPES];
 
        bool preserve_bios_swizzle;
 

diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
index a5af0c1269fc97656e085bceca235bc16160b8b2..dde6639da2fdc4bb3deca50d3129fd1709a587f1 100644 (file)
--- a/drivers/gpu/drm/xe/xe_device_types.h
+++ b/drivers/gpu/drm/xe/xe_device_types.h
@@ -499,7 +499,6 @@ struct xe_device {
 
        /* only to allow build, not used functionally */
        u32 irq_mask;
-       u32 pipestat_irq_mask[I915_MAX_PIPES];
 
        u32 enabled_irq_mask;