ARM: dts: stm32: remove some timer duplicate unit-address on stm32f4 series

Several unused "timer" are duplicate nodes of "timers" nodes.
There are two dt-schemas:
- timer/st,stm32-timer.yaml: A timer is needed on STM32F4 series, on all
  boards, to act as clockevent.
- mfd/st,stm32-timers.yaml: Timers can be used for other purpose.

By default, timer5 is left enabled to be used as clockevent. Remove all
other timer clockevent nodes that are currently unused and duplicated.

This removes several messages: Warning (unique_unit_address): /soc/timer@..
duplicate unit-address (also used in node /soc/timers@...)

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>

diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi
index 8748d58502980e7a0a3afc1d0d7526976c9cd328..f21b3227d107ed1497491eafdcc2470830fba92f 100644 (file)
--- a/arch/arm/boot/dts/stm32f429.dtsi
+++ b/arch/arm/boot/dts/stm32f429.dtsi
@@ -93,14 +93,6 @@
                        };
                };
 
-               timer2: timer@40000000 {
-                       compatible = "st,stm32-timer";
-                       reg = <0x40000000 0x400>;
-                       interrupts = <28>;
-                       clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM2)>;
-                       status = "disabled";
-               };
-
                timers2: timers@40000000 {
                        #address-cells = <1>;
                        #size-cells = <0>;
@@ -123,14 +115,6 @@
                        };
                };
 
-               timer3: timer@40000400 {
-                       compatible = "st,stm32-timer";
-                       reg = <0x40000400 0x400>;
-                       interrupts = <29>;
-                       clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM3)>;
-                       status = "disabled";
-               };
-
                timers3: timers@40000400 {
                        #address-cells = <1>;
                        #size-cells = <0>;
@@ -153,14 +137,6 @@
                        };
                };
 
-               timer4: timer@40000800 {
-                       compatible = "st,stm32-timer";
-                       reg = <0x40000800 0x400>;
-                       interrupts = <30>;
-                       clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM4)>;
-                       status = "disabled";
-               };
-
                timers4: timers@40000800 {
                        #address-cells = <1>;
                        #size-cells = <0>;
@@ -212,14 +188,6 @@
                        };
                };
 
-               timer6: timer@40001000 {
-                       compatible = "st,stm32-timer";
-                       reg = <0x40001000 0x400>;
-                       interrupts = <54>;
-                       clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM6)>;
-                       status = "disabled";
-               };
-
                timers6: timers@40001000 {
                        #address-cells = <1>;
                        #size-cells = <0>;
@@ -236,14 +204,6 @@
                        };
                };
 
-               timer7: timer@40001400 {
-                       compatible = "st,stm32-timer";
-                       reg = <0x40001400 0x400>;
-                       interrupts = <55>;
-                       clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM7)>;
-                       status = "disabled";
-               };
-
                timers7: timers@40001400 {
                        #address-cells = <1>;
                        #size-cells = <0>;