ARM: dts: Add nodes for dw_mmc controllers for Samsung EXYNOS5250 platforms
authorThomas Abraham <thomas.abraham@linaro.org>
Wed, 26 Sep 2012 00:02:59 +0000 (09:02 +0900)
committerKukjin Kim <kgene.kim@samsung.com>
Wed, 26 Sep 2012 00:03:02 +0000 (09:03 +0900)
Add device nodes for the four instances of dw_mmc controllers in
EXYNOS5250 and enable instance 0 and 2 for the SMDK5250 board.

Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
arch/arm/boot/dts/exynos5250-smdk5250.dts
arch/arm/boot/dts/exynos5250.dtsi

index 62e1039fb30e99c22f4d70190ae28ae55c45b21a..a352df403b7a5586ad1b2a47cb51c9eca0e89b0e 100644 (file)
        model = "SAMSUNG SMDK5250 board based on EXYNOS5250";
        compatible = "samsung,smdk5250", "samsung,exynos5250";
 
+       aliases {
+               mshc0 = &dwmmc_0;
+               mshc1 = &dwmmc_1;
+               mshc2 = &dwmmc_2;
+               mshc3 = &dwmmc_3;
+       };
+
        memory {
                reg = <0x40000000 0x80000000>;
        };
                status = "disabled";
        };
 
+       dwmmc_0: dwmmc0@12200000 {
+               num-slots = <1>;
+               supports-highspeed;
+               broken-cd;
+               fifo-depth = <0x80>;
+               card-detect-delay = <200>;
+               samsung,dw-mshc-ciu-div = <3>;
+               samsung,dw-mshc-sdr-timing = <2 3 3>;
+               samsung,dw-mshc-ddr-timing = <1 2 3>;
+
+               slot@0 {
+                       reg = <0>;
+                       bus-width = <8>;
+                       gpios = <&gpc0 0 2 0 3>, <&gpc0 1 2 0 3>,
+                               <&gpc1 0 2 3 3>, <&gpc1 1 2 3 3>,
+                               <&gpc1 2 2 3 3>, <&gpc1 3 2 3 3>,
+                               <&gpc0 3 2 3 3>, <&gpc0 4 2 3 3>,
+                               <&gpc0 5 2 3 3>, <&gpc0 6 2 3 3>;
+               };
+       };
+
+       dwmmc_1: dwmmc1@12210000 {
+               status = "disabled";
+       };
+
+       dwmmc_2: dwmmc2@12220000 {
+               num-slots = <1>;
+               supports-highspeed;
+               fifo-depth = <0x80>;
+               card-detect-delay = <200>;
+               samsung,dw-mshc-ciu-div = <3>;
+               samsung,dw-mshc-sdr-timing = <2 3 3>;
+               samsung,dw-mshc-ddr-timing = <1 2 3>;
+
+               slot@0 {
+                       reg = <0>;
+                       bus-width = <4>;
+                       samsung,cd-pinmux-gpio = <&gpc3 2 2 3 3>;
+                       gpios = <&gpc3 0 2 0 3>, <&gpc3 1 2 0 3>,
+                               <&gpc3 3 2 3 3>, <&gpc3 4 2 3 3>,
+                               <&gpc3 5 2 3 3>, <&gpc3 6 2 3 3>,
+                               <&gpc4 3 3 3 3>, <&gpc4 3 3 3 3>,
+                               <&gpc4 5 3 3 3>, <&gpc4 6 3 3 3>;
+               };
+       };
+
+       dwmmc_3: dwmmc3@12230000 {
+               status = "disabled";
+       };
+
        spi_0: spi@12d20000 {
                status = "disabled";
        };
index 004aaa8d123cd66fed607c7c45ebc5827cd018dd..f69e389e6ffa99c1f20ee932c8120ed4b6b00bd6 100644 (file)
                #size-cells = <0>;
        };
 
+       dwmmc0@12200000 {
+               compatible = "samsung,exynos5250-dw-mshc";
+               reg = <0x12200000 0x1000>;
+               interrupts = <0 75 0>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+       };
+
+       dwmmc1@12210000 {
+               compatible = "samsung,exynos5250-dw-mshc";
+               reg = <0x12210000 0x1000>;
+               interrupts = <0 76 0>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+       };
+
+       dwmmc2@12220000 {
+               compatible = "samsung,exynos5250-dw-mshc";
+               reg = <0x12220000 0x1000>;
+               interrupts = <0 77 0>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+       };
+
+       dwmmc3@12230000 {
+               compatible = "samsung,exynos5250-dw-mshc";
+               reg = <0x12230000 0x1000>;
+               interrupts = <0 78 0>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+       };
+
        amba {
                #address-cells = <1>;
                #size-cells = <1>;