drm/amdgpu: Add mqd support for the fence address

- Add a field in struct v11_gfx_mqd for userqueue
  fence address.

- Assign fence gpu VA address to the userqueue mqd
  fence address fields.

v2: Remove the mask and replace with lower_32_bits (Christian)

Signed-off-by: Arunpravin Paneer Selvam <Arunpravin.PaneerSelvam@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v11_0_userqueue.c b/drivers/gpu/drm/amd/amdgpu/mes_v11_0_userqueue.c
index e70b8e429e9c09f9e4d2e3d0aed42b5c67c4f573..b3aa49ff1a872b464d2998fcf0f3fb547a507035 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/mes_v11_0_userqueue.c
+++ b/drivers/gpu/drm/amd/amdgpu/mes_v11_0_userqueue.c
@@ -26,6 +26,7 @@
 #include "v11_structs.h"
 #include "mes_v11_0.h"
 #include "mes_v11_0_userqueue.h"
+#include "amdgpu_userq_fence.h"
 
 #define AMDGPU_USERQ_PROC_CTX_SZ PAGE_SIZE
 #define AMDGPU_USERQ_GANG_CTX_SZ PAGE_SIZE
@@ -229,6 +230,14 @@ static int mes_v11_0_userq_create_ctx_space(struct amdgpu_userq_mgr *uq_mgr,
        return 0;
 }
 
+static void mes_v11_0_userq_set_fence_space(struct amdgpu_usermode_queue *queue)
+{
+       struct v11_gfx_mqd *mqd = queue->mqd.cpu_ptr;
+
+       mqd->fenceaddress_lo = lower_32_bits(queue->fence_drv->gpu_addr);
+       mqd->fenceaddress_hi = upper_32_bits(queue->fence_drv->gpu_addr);
+}
+
 static int mes_v11_0_userq_mqd_create(struct amdgpu_userq_mgr *uq_mgr,
                                      struct drm_amdgpu_userq_in *args_in,
                                      struct amdgpu_usermode_queue *queue)
@@ -306,6 +315,8 @@ static int mes_v11_0_userq_mqd_create(struct amdgpu_userq_mgr *uq_mgr,
                goto free_mqd;
        }
 
+       mes_v11_0_userq_set_fence_space(queue);
+
        /* FW expects WPTR BOs to be mapped into GART */
        r = mes_v11_0_create_wptr_mapping(uq_mgr, queue, userq_props->wptr_gpu_addr);
        if (r) {

diff --git a/drivers/gpu/drm/amd/include/v11_structs.h b/drivers/gpu/drm/amd/include/v11_structs.h
index f8008270f81311cbfc23cca81e7f916dd38ec798..797ce6a1e56ebe475acef76ea8c000c60cdf4882 100644 (file)
--- a/drivers/gpu/drm/amd/include/v11_structs.h
+++ b/drivers/gpu/drm/amd/include/v11_structs.h
@@ -535,8 +535,8 @@ struct v11_gfx_mqd {
        uint32_t reserved_507; // offset: 507  (0x1FB)
        uint32_t reserved_508; // offset: 508  (0x1FC)
        uint32_t reserved_509; // offset: 509  (0x1FD)
-       uint32_t reserved_510; // offset: 510  (0x1FE)
-       uint32_t reserved_511; // offset: 511  (0x1FF)
+       uint32_t fenceaddress_lo; // offset: 510  (0x1FE)
+       uint32_t fenceaddress_hi; // offset: 511  (0x1FF)
 };
 
 struct v11_sdma_mqd {