arm64: dts: ti: k3-j721s2: Add bootph-* properties
authorManorit Chawdhry <m-chawdhry@ti.com>
Thu, 24 Oct 2024 05:21:01 +0000 (10:51 +0530)
committerVignesh Raghavendra <vigneshr@ti.com>
Mon, 28 Oct 2024 15:17:23 +0000 (20:47 +0530)
Adds bootph-* properties to the leaf nodes to enable bootloaders to
utilise them.

Following adds bootph-* to
- System controller nodes that allow controlling power domain, clocks, etc.
- secure_proxy_sa3/secure_proxy_main mboxes for communication with
  System Controller
- mcu_ringacc/mcu_udmap for DMA to SMS
- chipid for detection soc information.
- mcu_timer0 for bootloader tick-timer.
- wkup_vtm for enabling Adaptive voltage scaling(AVS) support

Reviewed-by: Andrew Davis <afd@ti.com>
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Link: https://lore.kernel.org/r/20241024-b4-upstream-bootph-all-v6-4-2af90e3a4fe7@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi

index 9ed6949b40e9dfafdaf6861944b0b128b053a44f..9889144d665a832e5346e13daa7887c9c968fbcd 100644 (file)
                              <0x00 0x32800000 0x00 0x100000>;
                        interrupt-names = "rx_011";
                        interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+                       bootph-all;
                };
 
                hwspinlock: spinlock@30e00000 {
index 9d96b19d0e7cf5bb86b50c73f4ec1a6b43b8bf83..c36888c455316774a07d69326262465ac958a6fc 100644 (file)
                k3_pds: power-controller {
                        compatible = "ti,sci-pm-domain";
                        #power-domain-cells = <2>;
+                       bootph-all;
                };
 
                k3_clks: clock-controller {
                        compatible = "ti,k2g-sci-clk";
                        #clock-cells = <2>;
+                       bootph-all;
                };
 
                k3_reset: reset-controller {
                        compatible = "ti,sci-reset";
                        #reset-cells = <2>;
+                       bootph-all;
                };
        };
 
@@ -43,6 +46,7 @@
                chipid: chipid@14 {
                        compatible = "ti,am654-chipid";
                        reg = <0x14 0x4>;
+                       bootph-all;
                };
        };
 
@@ -53,6 +57,8 @@
                reg = <0x00 0x43600000 0x00 0x10000>,
                      <0x00 0x44880000 0x00 0x20000>,
                      <0x00 0x44860000 0x00 0x20000>;
+               bootph-pre-ram;
+
                /*
                 * Marked Disabled:
                 * Node is incomplete as it is meant for bootloaders and
                assigned-clocks = <&k3_clks 35 1>;
                assigned-clock-parents = <&k3_clks 35 2>;
                power-domains = <&k3_pds 35 TI_SCI_PD_EXCLUSIVE>;
+               bootph-pre-ram;
                ti,timer-pwm;
                /* Non-MPU Firmware usage */
                status = "reserved";
                clocks = <&k3_clks 223 1>;
                clock-names = "fck";
                power-domains = <&k3_pds 223 TI_SCI_PD_EXCLUSIVE>;
+               bootph-all;
                status = "disabled";
        };
 
                              <0x0 0x2a500000 0x0 0x40000>,
                              <0x0 0x28440000 0x0 0x40000>;
                        reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target", "cfg";
+                       bootph-all;
                        ti,num-rings = <286>;
                        ti,sci-rm-range-gp-rings = <0x1>;
                        ti,sci = <&sms>;
                                    "tchan", "rchan", "rflow";
                        msi-parent = <&main_udmass_inta>;
                        #dma-cells = <1>;
+                       bootph-all;
 
                        ti,sci = <&sms>;
                        ti,sci-dev-id = <273>;
                reg = <0x00 0x2a480000 0x00 0x80000>,
                      <0x00 0x2a380000 0x00 0x80000>,
                      <0x00 0x2a400000 0x00 0x80000>;
+               bootph-pre-ram;
+
                /*
                 * Marked Disabled:
                 * Node is incomplete as it is meant for bootloaders and
                      <0x00 0x42050000 0x0 0x350>;
                power-domains = <&k3_pds 180 TI_SCI_PD_SHARED>;
                #thermal-sensor-cells = <1>;
+               bootph-pre-ram;
        };
 
        mcu_r5fss0: r5fss@41000000 {