clk: ralink: mtmips: remove duplicated 'xtal' clock for Ralink SoC RT3883
authorSergio Paracuellos <sergio.paracuellos@gmail.com>
Wed, 8 Jan 2025 09:36:36 +0000 (10:36 +0100)
committerStephen Boyd <sboyd@kernel.org>
Mon, 13 Jan 2025 21:35:38 +0000 (13:35 -0800)
Ralink SoC RT3883 has already 'xtal' defined as a base clock so there is no
need to redefine it again in fixed clocks section. Hence, remove the duplicate
one from there.

Fixes: d34db686a3d7 ("clk: ralink: mtmips: fix clocks probe order in oldest ralink SoCs")
Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Link: https://lore.kernel.org/r/20250108093636.265033-1-sergio.paracuellos@gmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
drivers/clk/ralink/clk-mtmips.c

index 97b8ca0f91816f376407d5ccd2320fc131879202..19d433034884ae5f091e252d656afbb53045a050 100644 (file)
@@ -266,7 +266,6 @@ err_clk_unreg:
        }
 
 static struct mtmips_clk_fixed rt3883_fixed_clocks[] = {
-       CLK_FIXED("xtal", NULL, 40000000),
        CLK_FIXED("periph", "xtal", 40000000)
 };