drm/amd/display: Use channel_width = 2 for vram table 3.0
authorAlvin Lee <alvin.lee2@amd.com>
Fri, 1 Dec 2023 13:25:07 +0000 (06:25 -0700)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 6 Dec 2023 20:22:33 +0000 (15:22 -0500)
VBIOS has suggested to use channel_width=2 for any ASIC that uses vram
info 3.0. This is because channel_width in the vram table no longer
represents the memory width

Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: Samson Tam <samson.tam@amd.com>
Acked-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com>
Signed-off-by: Alvin Lee <alvin.lee2@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c

index 2fb804eb5702e9ca03fe0e7228e47c55fb5e6928..01abc2f3081a8411843e0dd70283a1b412ccf973 100644 (file)
@@ -2386,7 +2386,13 @@ static enum bp_result get_vram_info_v30(
                return BP_RESULT_BADBIOSTABLE;
 
        info->num_chans = info_v30->channel_num;
-       info->dram_channel_width_bytes = (1 << info_v30->channel_width) / 8;
+       /* As suggested by VBIOS we should always use
+        * dram_channel_width_bytes = 2 when using VRAM
+        * table version 3.0. This is because the channel_width
+        * param in the VRAM info table is changed in 7000 series and
+        * no longer represents the memory channel width.
+        */
+       info->dram_channel_width_bytes = 2;
 
        return result;
 }