e1000e: Add support for Lunar Lake
authorSasha Neftin <sasha.neftin@intel.com>
Thu, 4 Mar 2021 07:38:13 +0000 (09:38 +0200)
committerTony Nguyen <anthony.l.nguyen@intel.com>
Tue, 20 Jul 2021 23:11:36 +0000 (16:11 -0700)
Add devices IDs for the next LOM generations that will be
available on the next Intel Client platform (Lunar Lake)
This patch provides the initial support for these devices

Signed-off-by: Sasha Neftin <sasha.neftin@intel.com>
Tested-by: Dvora Fuxbrumer <dvorax.fuxbrumer@linux.intel.com>
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
drivers/net/ethernet/intel/e1000e/ethtool.c
drivers/net/ethernet/intel/e1000e/hw.h
drivers/net/ethernet/intel/e1000e/ich8lan.c
drivers/net/ethernet/intel/e1000e/netdev.c
drivers/net/ethernet/intel/e1000e/ptp.c

index 06442e6bef7310e41852bdb727d1b2c3c583a050..7256b43b7a65377d0f77dfa7735de8b8dff9221b 100644 (file)
@@ -903,6 +903,7 @@ static int e1000_reg_test(struct e1000_adapter *adapter, u64 *data)
        case e1000_pch_tgp:
        case e1000_pch_adp:
        case e1000_pch_mtp:
+       case e1000_pch_lnp:
                mask |= BIT(18);
                break;
        default:
@@ -1569,6 +1570,7 @@ static void e1000_loopback_cleanup(struct e1000_adapter *adapter)
        case e1000_pch_tgp:
        case e1000_pch_adp:
        case e1000_pch_mtp:
+       case e1000_pch_lnp:
                fext_nvm11 = er32(FEXTNVM11);
                fext_nvm11 &= ~E1000_FEXTNVM11_DISABLE_MULR_FIX;
                ew32(FEXTNVM11, fext_nvm11);
index db79c4e6413e5e611803363b4211709ce15ebade..36ff936918c93eb565f7e02481156fa849e605a0 100644 (file)
@@ -106,6 +106,10 @@ struct e1000_hw;
 #define E1000_DEV_ID_PCH_MTP_I219_V18          0x550B
 #define E1000_DEV_ID_PCH_MTP_I219_LM19         0x550C
 #define E1000_DEV_ID_PCH_MTP_I219_V19          0x550D
+#define E1000_DEV_ID_PCH_LNP_I219_LM20         0x550E
+#define E1000_DEV_ID_PCH_LNP_I219_V20          0x550F
+#define E1000_DEV_ID_PCH_LNP_I219_LM21         0x5510
+#define E1000_DEV_ID_PCH_LNP_I219_V21          0x5511
 
 #define E1000_REVISION_4       4
 
@@ -132,6 +136,7 @@ enum e1000_mac_type {
        e1000_pch_tgp,
        e1000_pch_adp,
        e1000_pch_mtp,
+       e1000_pch_lnp,
 };
 
 enum e1000_media_type {
index cf7b3887da1d5822779befc94905249e9cd1e172..b75196c6a29b898b2534afd73f9e5204c20c5922 100644 (file)
@@ -321,6 +321,7 @@ static s32 e1000_init_phy_workarounds_pchlan(struct e1000_hw *hw)
        case e1000_pch_tgp:
        case e1000_pch_adp:
        case e1000_pch_mtp:
+       case e1000_pch_lnp:
                if (e1000_phy_is_accessible_pchlan(hw))
                        break;
 
@@ -466,6 +467,7 @@ static s32 e1000_init_phy_params_pchlan(struct e1000_hw *hw)
                case e1000_pch_tgp:
                case e1000_pch_adp:
                case e1000_pch_mtp:
+               case e1000_pch_lnp:
                        /* In case the PHY needs to be in mdio slow mode,
                         * set slow mode and try to get the PHY id again.
                         */
@@ -711,6 +713,7 @@ static s32 e1000_init_mac_params_ich8lan(struct e1000_hw *hw)
        case e1000_pch_tgp:
        case e1000_pch_adp:
        case e1000_pch_mtp:
+       case e1000_pch_lnp:
        case e1000_pchlan:
                /* check management mode */
                mac->ops.check_mng_mode = e1000_check_mng_mode_pchlan;
@@ -1663,6 +1666,7 @@ static s32 e1000_get_variants_ich8lan(struct e1000_adapter *adapter)
        case e1000_pch_tgp:
        case e1000_pch_adp:
        case e1000_pch_mtp:
+       case e1000_pch_lnp:
                rc = e1000_init_phy_params_pchlan(hw);
                break;
        default:
@@ -2118,6 +2122,7 @@ static s32 e1000_sw_lcd_config_ich8lan(struct e1000_hw *hw)
        case e1000_pch_tgp:
        case e1000_pch_adp:
        case e1000_pch_mtp:
+       case e1000_pch_lnp:
                sw_cfg_mask = E1000_FEXTNVM_SW_CONFIG_ICH8M;
                break;
        default:
@@ -3162,6 +3167,7 @@ static s32 e1000_valid_nvm_bank_detect_ich8lan(struct e1000_hw *hw, u32 *bank)
        case e1000_pch_tgp:
        case e1000_pch_adp:
        case e1000_pch_mtp:
+       case e1000_pch_lnp:
                bank1_offset = nvm->flash_bank_size;
                act_offset = E1000_ICH_NVM_SIG_WORD;
 
@@ -4101,6 +4107,7 @@ static s32 e1000_validate_nvm_checksum_ich8lan(struct e1000_hw *hw)
        case e1000_pch_tgp:
        case e1000_pch_adp:
        case e1000_pch_mtp:
+       case e1000_pch_lnp:
                word = NVM_COMPAT;
                valid_csum_mask = NVM_COMPAT_VALID_CSUM;
                break;
index 79e8791119cd88a9e3cdfb2246ca51f993fce5c2..59f22a75b96d249dd84ed632dcb29422dd54b786 100644 (file)
@@ -3550,6 +3550,7 @@ s32 e1000e_get_base_timinca(struct e1000_adapter *adapter, u32 *timinca)
        case e1000_pch_tgp:
        case e1000_pch_adp:
        case e1000_pch_mtp:
+       case e1000_pch_lnp:
                if (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI) {
                        /* Stable 24MHz frequency */
                        incperiod = INCPERIOD_24MHZ;
@@ -4068,6 +4069,7 @@ void e1000e_reset(struct e1000_adapter *adapter)
        case e1000_pch_tgp:
        case e1000_pch_adp:
        case e1000_pch_mtp:
+       case e1000_pch_lnp:
                fc->refresh_time = 0xFFFF;
                fc->pause_time = 0xFFFF;
 
@@ -7908,6 +7910,10 @@ static const struct pci_device_id e1000_pci_tbl[] = {
        { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_MTP_I219_V18), board_pch_cnp },
        { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_MTP_I219_LM19), board_pch_cnp },
        { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_MTP_I219_V19), board_pch_cnp },
+       { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LNP_I219_LM20), board_pch_cnp },
+       { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LNP_I219_V20), board_pch_cnp },
+       { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LNP_I219_LM21), board_pch_cnp },
+       { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LNP_I219_V21), board_pch_cnp },
 
        { 0, 0, 0, 0, 0, 0, 0 } /* terminate list */
 };
index 9e79d672f4f18478643094be0974c80a854539f5..eb5c014c02fb2747b5047c427abafcfae9f3c602 100644 (file)
@@ -298,6 +298,7 @@ void e1000e_ptp_init(struct e1000_adapter *adapter)
        case e1000_pch_tgp:
        case e1000_pch_adp:
        case e1000_pch_mtp:
+       case e1000_pch_lnp:
                if ((hw->mac.type < e1000_pch_lpt) ||
                    (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI)) {
                        adapter->ptp_clock_info.max_adj = 24000000 - 1;