arm64: dts: qcom: correct gpio-ranges for QCS615

Correct the gpio-ranges for the QCS615 TLMM pin controller to include
GPIOs 0-122 and the UFS_RESET pin for primary UFS memory reset.

Fixes: 8e266654a2fe ("arm64: dts: qcom: add QCS615 platform")
Signed-off-by: Lijuan Gao <quic_lijuang@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20241219-correct_gpio_ranges-v2-5-19af8588dbd0@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/qcs615.dtsi b/arch/arm64/boot/dts/qcom/qcs615.dtsi
index 84a378487dceabc282c75d3a26d060484dfa85fb..6f87e3072069b7bdc8dba9cbd615471b2003ee10 100644 (file)
--- a/arch/arm64/boot/dts/qcom/qcs615.dtsi
+++ b/arch/arm64/boot/dts/qcom/qcs615.dtsi
@@ -938,7 +938,7 @@
                                    "west",
                                    "south";
                        interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
-                       gpio-ranges = <&tlmm 0 0 123>;
+                       gpio-ranges = <&tlmm 0 0 124>;
                        gpio-controller;
                        #gpio-cells = <2>;
                        interrupt-controller;