clk: renesas: r8a77965: Add RPC clocks

Describe the RPCSRC internal clock and the RPC[D2] clocks derived from
it, as well as the RPC-IF module clock, in the R-Car M3-N (R8A77965)
CPG/MSSR driver.

Inspired by commit 94e3935b5756 ("clk: renesas: r8a77980: Add RPC clocks").

Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
Link: https://lore.kernel.org/r/20200203072901.31548-3-dirk.behme@de.bosch.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/drivers/clk/renesas/r8a77965-cpg-mssr.c b/drivers/clk/renesas/r8a77965-cpg-mssr.c
index 9530480880f185a4d642cceea9d6d2f4ca20c630..7a05a2fc1cc636909844549c6678602b9d6ea84d 100644 (file)
--- a/drivers/clk/renesas/r8a77965-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a77965-cpg-mssr.c
@@ -43,6 +43,7 @@ enum clk_ids {
        CLK_S3,
        CLK_SDSRC,
        CLK_SSPSRC,
+       CLK_RPCSRC,
        CLK_RINT,
 
        /* Module Clocks */
@@ -68,6 +69,12 @@ static const struct cpg_core_clk r8a77965_core_clks[] __initconst = {
        DEF_FIXED(".s2",        CLK_S2,                 CLK_PLL1_DIV2,  4, 1),
        DEF_FIXED(".s3",        CLK_S3,                 CLK_PLL1_DIV2,  6, 1),
        DEF_FIXED(".sdsrc",     CLK_SDSRC,              CLK_PLL1_DIV2,  2, 1),
+       DEF_BASE(".rpcsrc",     CLK_RPCSRC, CLK_TYPE_GEN3_RPCSRC, CLK_PLL1),
+
+       DEF_BASE("rpc",         R8A77965_CLK_RPC, CLK_TYPE_GEN3_RPC,
+                CLK_RPCSRC),
+       DEF_BASE("rpcd2",       R8A77965_CLK_RPCD2, CLK_TYPE_GEN3_RPCD2,
+                R8A77965_CLK_RPC),
 
        DEF_GEN3_OSC(".r",      CLK_RINT,               CLK_EXTAL,      32),
 
@@ -217,6 +224,7 @@ static const struct mssr_mod_clk r8a77965_mod_clks[] __initconst = {
        DEF_MOD("can-fd",               914,    R8A77965_CLK_S3D2),
        DEF_MOD("can-if1",              915,    R8A77965_CLK_S3D4),
        DEF_MOD("can-if0",              916,    R8A77965_CLK_S3D4),
+       DEF_MOD("rpc-if",               917,    R8A77965_CLK_RPCD2),
        DEF_MOD("i2c6",                 918,    R8A77965_CLK_S0D6),
        DEF_MOD("i2c5",                 919,    R8A77965_CLK_S0D6),
        DEF_MOD("i2c-dvfs",             926,    R8A77965_CLK_CP),