drm/i915/huc: make "support huc" reflect HW capabilities
authorDaniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Thu, 26 Mar 2020 18:11:18 +0000 (11:11 -0700)
committerChris Wilson <chris@chris-wilson.co.uk>
Thu, 26 Mar 2020 21:22:01 +0000 (21:22 +0000)
We currently initialize HuC support based on GuC being enabled in
modparam; this means that huc_is_supported() can return false on HW that
does have a HuC when enable_guc=0. The rationale for this behavior is
that HuC requires GuC for authentication and therefore is not supported
by itself. However, we do not allow defining HuC fw wthout GuC fw and
selecting HuC in modparam implicitly selects GuC as well, so we can't
actually hit a scenario where HuC is selected alone. Therefore, we can
flip the support check to reflect the HW capabilities and fw
availability, which is more intuitive and will make it cleaner to log
HuC the difference between not supported in HW and not selected.

Removing the difference between GuC and HuC also allows us to simplify
the init_early, since we don't need to differentiate the support based
on the type of uC.

Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: John Harrison <John.C.Harrison@Intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: Andi Shyti <andi.shyti@intel.com>
Reviewed-by: John Harrison <John.C.Harrison@Intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20200326181121.16869-4-daniele.ceraolospurio@intel.com
drivers/gpu/drm/i915/gt/uc/intel_guc.c
drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c
drivers/gpu/drm/i915/gt/uc/intel_guc_fw.h
drivers/gpu/drm/i915/gt/uc/intel_huc.c
drivers/gpu/drm/i915/gt/uc/intel_huc_fw.c
drivers/gpu/drm/i915/gt/uc/intel_huc_fw.h
drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h

index 819f09ef51fc214e4b491458b2c8e12fd9c2a5d8..827d75073879bb800bf68063ec5b7468621f4bbc 100644 (file)
@@ -169,7 +169,7 @@ void intel_guc_init_early(struct intel_guc *guc)
 {
        struct drm_i915_private *i915 = guc_to_gt(guc)->i915;
 
-       intel_guc_fw_init_early(guc);
+       intel_uc_fw_init_early(&guc->fw, INTEL_UC_FW_TYPE_GUC);
        intel_guc_ct_init_early(&guc->ct);
        intel_guc_log_init_early(&guc->log);
        intel_guc_submission_init_early(guc);
index 3a1c47d600ea3611c8ebd3e6ce42048f04227de3..d4a87f4c9421f2fab2eafd831913536907c49eb5 100644 (file)
 #include "intel_guc_fw.h"
 #include "i915_drv.h"
 
-/**
- * intel_guc_fw_init_early() - initializes GuC firmware struct
- * @guc: intel_guc struct
- *
- * On platforms with GuC selects firmware for uploading
- */
-void intel_guc_fw_init_early(struct intel_guc *guc)
-{
-       struct drm_i915_private *i915 = guc_to_gt(guc)->i915;
-
-       intel_uc_fw_init_early(&guc->fw, INTEL_UC_FW_TYPE_GUC, HAS_GT_UC(i915),
-                              INTEL_INFO(i915)->platform, INTEL_REVID(i915));
-}
-
 static void guc_prepare_xfer(struct intel_uncore *uncore)
 {
        u32 shim_flags = GUC_DISABLE_SRAM_INIT_TO_ZEROES |
index b5ab639d7259d56f34a5883ddd9de09daaa9d19d..0b4d2a9c94359859196ed09b5c8fe73d4643a582 100644 (file)
@@ -8,7 +8,6 @@
 
 struct intel_guc;
 
-void intel_guc_fw_init_early(struct intel_guc *guc);
 int intel_guc_fw_upload(struct intel_guc *guc);
 
 #endif
index a74b65694512f648c83a7d69a45a5c7561541d69..d73dc21686e72ac06076266b9046127e4f081637 100644 (file)
@@ -41,7 +41,7 @@ void intel_huc_init_early(struct intel_huc *huc)
 {
        struct drm_i915_private *i915 = huc_to_gt(huc)->i915;
 
-       intel_huc_fw_init_early(huc);
+       intel_uc_fw_init_early(&huc->fw, INTEL_UC_FW_TYPE_HUC);
 
        if (INTEL_GEN(i915) >= 11) {
                huc->status.reg = GEN11_HUC_KERNEL_LOAD_INFO;
index 9cdf4cbe691c96c248c630573c26f75a59bd862b..e5ef509c70e8944712a67431c1a21b0f084ae099 100644 (file)
@@ -7,23 +7,6 @@
 #include "intel_huc_fw.h"
 #include "i915_drv.h"
 
-/**
- * intel_huc_fw_init_early() - initializes HuC firmware struct
- * @huc: intel_huc struct
- *
- * On platforms with HuC selects firmware for uploading
- */
-void intel_huc_fw_init_early(struct intel_huc *huc)
-{
-       struct intel_gt *gt = huc_to_gt(huc);
-       struct intel_uc *uc = &gt->uc;
-       struct drm_i915_private *i915 = gt->i915;
-
-       intel_uc_fw_init_early(&huc->fw, INTEL_UC_FW_TYPE_HUC,
-                              intel_uc_wants_guc(uc),
-                              INTEL_INFO(i915)->platform, INTEL_REVID(i915));
-}
-
 /**
  * intel_huc_fw_upload() - load HuC uCode to device
  * @huc: intel_huc structure
index b791269ce923eb96194add464b67434face0320c..12f264ee3e0b366773c631b842aa569107f5cfbe 100644 (file)
@@ -8,7 +8,6 @@
 
 struct intel_huc;
 
-void intel_huc_fw_init_early(struct intel_huc *huc);
 int intel_huc_fw_upload(struct intel_huc *huc);
 
 #endif
index 18c7552036885495aec72be41ced7da2d730c6f5..fa893dd1823cbb8f29cd07558ac90f6ae3bbd1d3 100644 (file)
 #include "intel_uc_fw_abi.h"
 #include "i915_drv.h"
 
-static inline struct intel_gt *__uc_fw_to_gt(struct intel_uc_fw *uc_fw)
+static inline struct intel_gt *
+____uc_fw_to_gt(struct intel_uc_fw *uc_fw, enum intel_uc_fw_type type)
 {
-       GEM_BUG_ON(uc_fw->status == INTEL_UC_FIRMWARE_UNINITIALIZED);
-       if (uc_fw->type == INTEL_UC_FW_TYPE_GUC)
+       if (type == INTEL_UC_FW_TYPE_GUC)
                return container_of(uc_fw, struct intel_gt, uc.guc.fw);
 
-       GEM_BUG_ON(uc_fw->type != INTEL_UC_FW_TYPE_HUC);
+       GEM_BUG_ON(type != INTEL_UC_FW_TYPE_HUC);
        return container_of(uc_fw, struct intel_gt, uc.huc.fw);
 }
 
+static inline struct intel_gt *__uc_fw_to_gt(struct intel_uc_fw *uc_fw)
+{
+       GEM_BUG_ON(uc_fw->status == INTEL_UC_FIRMWARE_UNINITIALIZED);
+       return ____uc_fw_to_gt(uc_fw, uc_fw->type);
+}
+
 #ifdef CONFIG_DRM_I915_DEBUG_GUC
 void intel_uc_fw_change_status(struct intel_uc_fw *uc_fw,
                               enum intel_uc_fw_status status)
@@ -195,9 +201,10 @@ static void __uc_fw_user_override(struct intel_uc_fw *uc_fw)
  * firmware to fetch and load.
  */
 void intel_uc_fw_init_early(struct intel_uc_fw *uc_fw,
-                           enum intel_uc_fw_type type, bool supported,
-                           enum intel_platform platform, u8 rev)
+                           enum intel_uc_fw_type type)
 {
+       struct drm_i915_private *i915 = ____uc_fw_to_gt(uc_fw, type)->i915;
+
        /*
         * we use FIRMWARE_UNINITIALIZED to detect checks against uc_fw->status
         * before we're looked at the HW caps to see if we have uc support
@@ -208,8 +215,10 @@ void intel_uc_fw_init_early(struct intel_uc_fw *uc_fw,
 
        uc_fw->type = type;
 
-       if (supported) {
-               __uc_fw_auto_select(uc_fw, platform, rev);
+       if (HAS_GT_UC(i915)) {
+               __uc_fw_auto_select(uc_fw,
+                                   INTEL_INFO(i915)->platform,
+                                   INTEL_REVID(i915));
                __uc_fw_user_override(uc_fw);
        }
 
index 888ff0de0244b5af4347b9d9ddaf3155d1905657..23d3a423ac0fd4d3d140a29d8fe51e40f0875f6e 100644 (file)
@@ -239,8 +239,7 @@ static inline u32 intel_uc_fw_get_upload_size(struct intel_uc_fw *uc_fw)
 }
 
 void intel_uc_fw_init_early(struct intel_uc_fw *uc_fw,
-                           enum intel_uc_fw_type type, bool supported,
-                           enum intel_platform platform, u8 rev);
+                           enum intel_uc_fw_type type);
 int intel_uc_fw_fetch(struct intel_uc_fw *uc_fw);
 void intel_uc_fw_cleanup_fetch(struct intel_uc_fw *uc_fw);
 int intel_uc_fw_upload(struct intel_uc_fw *uc_fw, u32 offset, u32 dma_flags);