gpio: merrifield: Better show how GPIO and IRQ bases are derived from hardware

It's a bit hard to realize what the BAR1 is for and what is the layout
of the data in it. Be slightly more verbose to better show how GPIO and
IRQ bases are derived from the hardware.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

diff --git a/drivers/gpio/gpio-merrifield.c b/drivers/gpio/gpio-merrifield.c
index 11e6ea70568a4a2acefce9371e9d1a91f7e32c0c..706687fab634e7545e7ed8e75f1f74bd9a644c49 100644 (file)
--- a/drivers/gpio/gpio-merrifield.c
+++ b/drivers/gpio/gpio-merrifield.c
@@ -443,8 +443,8 @@ static int mrfld_gpio_probe(struct pci_dev *pdev, const struct pci_device_id *id
 
        base = pcim_iomap_table(pdev)[1];
 
-       irq_base = readl(base);
-       gpio_base = readl(sizeof(u32) + base);
+       irq_base = readl(base + 0 * sizeof(u32));
+       gpio_base = readl(base + 1 * sizeof(u32));
 
        /* Release the IO mapping, since we already get the info from BAR1 */
        pcim_iounmap_regions(pdev, BIT(1));