drm/msm/hdmi: simplify extp clock handling
authorDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Mon, 5 May 2025 00:14:48 +0000 (03:14 +0300)
committerDmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Mon, 12 May 2025 16:18:48 +0000 (19:18 +0300)
With the extp being the only "power" clock left, remove the surrounding
loops and handle the extp clock directly.

Reviewed-by: Jessica Zhang <quic_jesszhan@quicinc.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/651710/
Link: https://lore.kernel.org/r/20250505-fd-hdmi-hpd-v5-4-48541f76318c@oss.qualcomm.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
drivers/gpu/drm/msm/hdmi/hdmi.c
drivers/gpu/drm/msm/hdmi/hdmi.h
drivers/gpu/drm/msm/hdmi/hdmi_bridge.c

index ebf9d8162c6e5759a3780c74354b6c159598750f..104f9cefa14834d04fb957eb48777e605d1e29a5 100644 (file)
@@ -233,13 +233,11 @@ static const struct hdmi_platform_config hdmi_tx_8960_config = {
 };
 
 static const char * const pwr_reg_names_8x74[] = {"core-vdda", "core-vcc"};
-static const char * const pwr_clk_names_8x74[] = {"extp"};
 static const char * const hpd_clk_names_8x74[] = {"iface", "core", "mdp_core", "alt_iface"};
 static unsigned long hpd_clk_freq_8x74[] = {0, 19200000, 0, 0};
 
 static const struct hdmi_platform_config hdmi_tx_8974_config = {
                HDMI_CFG(pwr_reg, 8x74),
-               HDMI_CFG(pwr_clk, 8x74),
                HDMI_CFG(hpd_clk, 8x74),
                .hpd_freq      = hpd_clk_freq_8x74,
 };
@@ -369,24 +367,10 @@ static int msm_hdmi_dev_probe(struct platform_device *pdev)
                hdmi->hpd_clks[i] = clk;
        }
 
-       hdmi->pwr_clks = devm_kcalloc(&pdev->dev,
-                                     config->pwr_clk_cnt,
-                                     sizeof(hdmi->pwr_clks[0]),
-                                     GFP_KERNEL);
-       if (!hdmi->pwr_clks)
-               return -ENOMEM;
-
-       for (i = 0; i < config->pwr_clk_cnt; i++) {
-               struct clk *clk;
-
-               clk = msm_clk_get(pdev, config->pwr_clk_names[i]);
-               if (IS_ERR(clk))
-                       return dev_err_probe(dev, PTR_ERR(clk),
-                                            "failed to get pwr clk: %s\n",
-                                            config->pwr_clk_names[i]);
-
-               hdmi->pwr_clks[i] = clk;
-       }
+       hdmi->extp_clk = devm_clk_get_optional(&pdev->dev, "extp");
+       if (IS_ERR(hdmi->extp_clk))
+               return dev_err_probe(dev, PTR_ERR(hdmi->extp_clk),
+                                    "failed to get extp clock\n");
 
        hdmi->hpd_gpiod = devm_gpiod_get_optional(&pdev->dev, "hpd", GPIOD_IN);
        /* This will catch e.g. -EPROBE_DEFER */
index 381f957b34305494cb4da0b7dccb73b6ac3a1377..3314bb8a09d6bea7e34ad9050970bf43c64d1558 100644 (file)
@@ -50,7 +50,7 @@ struct hdmi {
        struct regulator_bulk_data *hpd_regs;
        struct regulator_bulk_data *pwr_regs;
        struct clk **hpd_clks;
-       struct clk **pwr_clks;
+       struct clk *extp_clk;
 
        struct gpio_desc *hpd_gpiod;
 
@@ -95,10 +95,6 @@ struct hdmi_platform_config {
        const char * const *hpd_clk_names;
        const long unsigned *hpd_freq;
        int hpd_clk_cnt;
-
-       /* clks that need to be on for screen pwr (ie pixel clk): */
-       const char * const *pwr_clk_names;
-       int pwr_clk_cnt;
 };
 
 struct hdmi_bridge {
index 9f1191e4c02081c99caa75e1c9c99051f7cd14d1..e7997e4a741c3b27c9086651efe6b79dbba6bf88 100644 (file)
@@ -19,7 +19,7 @@ static void msm_hdmi_power_on(struct drm_bridge *bridge)
        struct hdmi_bridge *hdmi_bridge = to_hdmi_bridge(bridge);
        struct hdmi *hdmi = hdmi_bridge->hdmi;
        const struct hdmi_platform_config *config = hdmi->config;
-       int i, ret;
+       int ret;
 
        pm_runtime_get_sync(&hdmi->pdev->dev);
 
@@ -27,21 +27,15 @@ static void msm_hdmi_power_on(struct drm_bridge *bridge)
        if (ret)
                DRM_DEV_ERROR(dev->dev, "failed to enable pwr regulator: %d\n", ret);
 
-       if (config->pwr_clk_cnt > 0) {
+       if (hdmi->extp_clk) {
                DBG("pixclock: %lu", hdmi->pixclock);
-               ret = clk_set_rate(hdmi->pwr_clks[0], hdmi->pixclock);
-               if (ret) {
-                       DRM_DEV_ERROR(dev->dev, "failed to set pixel clk: %s (%d)\n",
-                                       config->pwr_clk_names[0], ret);
-               }
-       }
+               ret = clk_set_rate(hdmi->extp_clk, hdmi->pixclock);
+               if (ret)
+                       DRM_DEV_ERROR(dev->dev, "failed to set extp clk rate: %d\n", ret);
 
-       for (i = 0; i < config->pwr_clk_cnt; i++) {
-               ret = clk_prepare_enable(hdmi->pwr_clks[i]);
-               if (ret) {
-                       DRM_DEV_ERROR(dev->dev, "failed to enable pwr clk: %s (%d)\n",
-                                       config->pwr_clk_names[i], ret);
-               }
+               ret = clk_prepare_enable(hdmi->extp_clk);
+               if (ret)
+                       DRM_DEV_ERROR(dev->dev, "failed to enable extp clk: %d\n", ret);
        }
 }
 
@@ -51,15 +45,15 @@ static void power_off(struct drm_bridge *bridge)
        struct hdmi_bridge *hdmi_bridge = to_hdmi_bridge(bridge);
        struct hdmi *hdmi = hdmi_bridge->hdmi;
        const struct hdmi_platform_config *config = hdmi->config;
-       int i, ret;
+       int ret;
 
        /* TODO do we need to wait for final vblank somewhere before
         * cutting the clocks?
         */
        mdelay(16 + 4);
 
-       for (i = 0; i < config->pwr_clk_cnt; i++)
-               clk_disable_unprepare(hdmi->pwr_clks[i]);
+       if (hdmi->extp_clk)
+               clk_disable_unprepare(hdmi->extp_clk);
 
        ret = regulator_bulk_disable(config->pwr_reg_cnt, hdmi->pwr_regs);
        if (ret)
@@ -438,7 +432,6 @@ static enum drm_mode_status msm_hdmi_bridge_tmds_char_rate_valid(const struct dr
 {
        struct hdmi_bridge *hdmi_bridge = to_hdmi_bridge(bridge);
        struct hdmi *hdmi = hdmi_bridge->hdmi;
-       const struct hdmi_platform_config *config = hdmi->config;
        struct msm_drm_private *priv = bridge->dev->dev_private;
        struct msm_kms *kms = priv->kms;
        long actual;
@@ -451,8 +444,8 @@ static enum drm_mode_status msm_hdmi_bridge_tmds_char_rate_valid(const struct dr
                actual = kms->funcs->round_pixclk(kms,
                                                  tmds_rate,
                                                  hdmi_bridge->hdmi->encoder);
-       else if (config->pwr_clk_cnt > 0)
-               actual = clk_round_rate(hdmi->pwr_clks[0], tmds_rate);
+       else if (hdmi->extp_clk)
+               actual = clk_round_rate(hdmi->extp_clk, tmds_rate);
        else
                actual = tmds_rate;