net: phy: broadcom: add exp register access methods without buslock
authorMichael Walle <michael@walle.cc>
Wed, 13 May 2020 16:35:21 +0000 (18:35 +0200)
committerDavid S. Miller <davem@davemloft.net>
Wed, 13 May 2020 19:52:38 +0000 (12:52 -0700)
Add helper to read and write expansion registers without taking the mdio
lock.

Please note, that this changes the semantics of the read and write.
Before there was no lock between selecting the expansion register and
the actual read/write. This may lead to access failures if there are
parallel accesses. Instead take the bus lock during the whole access
cycle.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/phy/bcm-phy-lib.c
drivers/net/phy/bcm-phy-lib.h

index d5f9a27019898083eaa458576cd8d384a515dd14..a390812714eda1d3a7d5488ec4cdc3d956d07484 100644 (file)
 #define MII_BCM_CHANNEL_WIDTH     0x2000
 #define BCM_CL45VEN_EEE_ADV       0x3c
 
-int bcm_phy_write_exp(struct phy_device *phydev, u16 reg, u16 val)
+int __bcm_phy_write_exp(struct phy_device *phydev, u16 reg, u16 val)
 {
        int rc;
 
-       rc = phy_write(phydev, MII_BCM54XX_EXP_SEL, reg);
+       rc = __phy_write(phydev, MII_BCM54XX_EXP_SEL, reg);
        if (rc < 0)
                return rc;
 
-       return phy_write(phydev, MII_BCM54XX_EXP_DATA, val);
+       return __phy_write(phydev, MII_BCM54XX_EXP_DATA, val);
+}
+EXPORT_SYMBOL_GPL(__bcm_phy_write_exp);
+
+int bcm_phy_write_exp(struct phy_device *phydev, u16 reg, u16 val)
+{
+       int rc;
+
+       phy_lock_mdio_bus(phydev);
+       rc = __bcm_phy_write_exp(phydev, reg, val);
+       phy_unlock_mdio_bus(phydev);
+
+       return rc;
 }
 EXPORT_SYMBOL_GPL(bcm_phy_write_exp);
 
-int bcm_phy_read_exp(struct phy_device *phydev, u16 reg)
+int __bcm_phy_read_exp(struct phy_device *phydev, u16 reg)
 {
        int val;
 
-       val = phy_write(phydev, MII_BCM54XX_EXP_SEL, reg);
+       val = __phy_write(phydev, MII_BCM54XX_EXP_SEL, reg);
        if (val < 0)
                return val;
 
-       val = phy_read(phydev, MII_BCM54XX_EXP_DATA);
+       val = __phy_read(phydev, MII_BCM54XX_EXP_DATA);
 
        /* Restore default value.  It's O.K. if this write fails. */
-       phy_write(phydev, MII_BCM54XX_EXP_SEL, 0);
+       __phy_write(phydev, MII_BCM54XX_EXP_SEL, 0);
 
        return val;
 }
+EXPORT_SYMBOL_GPL(__bcm_phy_read_exp);
+
+int bcm_phy_read_exp(struct phy_device *phydev, u16 reg)
+{
+       int rc;
+
+       phy_lock_mdio_bus(phydev);
+       rc = __bcm_phy_read_exp(phydev, reg);
+       phy_unlock_mdio_bus(phydev);
+
+       return rc;
+}
 EXPORT_SYMBOL_GPL(bcm_phy_read_exp);
 
 int bcm54xx_auxctl_read(struct phy_device *phydev, u16 regnum)
index 4d3de91cda6c49963ab3f429aca6ee6b52456cd5..0eb5333cda39dc2cc682c8cd777cab71c328cbe9 100644 (file)
@@ -27,6 +27,8 @@
 #define AFE_HPF_TRIM_OTHERS            MISC_ADDR(0x3a, 0)
 
 
+int __bcm_phy_write_exp(struct phy_device *phydev, u16 reg, u16 val);
+int __bcm_phy_read_exp(struct phy_device *phydev, u16 reg);
 int bcm_phy_write_exp(struct phy_device *phydev, u16 reg, u16 val);
 int bcm_phy_read_exp(struct phy_device *phydev, u16 reg);