Merge tag 'imx-fixes-6.9' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo...

i.MX fixes for 6.9:

- A couple of i.MX7 board fixes from Fabio Estevam that use correct
  'no-mmc' property and pass 'link-frequencies' for OV2680.
- A series from Frank Li to fix LPCG clock indices for i.MX8 subsystems.
- A couple of changes from Tim Harvey that fix USB VBUS regulator for
  imx8mp-venice board.

* tag 'imx-fixes-6.9' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  arm64: dts: imx8qm-ss-dma: fix can lpcg indices
  arm64: dts: imx8-ss-dma: fix can lpcg indices
  arm64: dts: imx8-ss-dma: fix adc lpcg indices
  arm64: dts: imx8-ss-dma: fix pwm lpcg indices
  arm64: dts: imx8-ss-dma: fix spi lpcg indices
  arm64: dts: imx8-ss-conn: fix usb lpcg indices
  arm64: dts: imx8-ss-lsio: fix pwm lpcg indices
  ARM: dts: imx7s-warp: Pass OV2680 link-frequencies
  ARM: dts: imx7-mba7: Use 'no-mmc' property
  arm64: dts: imx8-ss-conn: fix usdhc wrong lpcg clock order
  arm64: dts: freescale: imx8mp-venice-gw73xx-2x: fix USB vbus regulator
  arm64: dts: freescale: imx8mp-venice-gw72xx-2x: fix USB vbus regulator

Link: https://lore.kernel.org/r/Zg5rfaVVvD9egoBK@dragon
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

diff --git a/arch/arm/boot/dts/nxp/imx/imx7-mba7.dtsi b/arch/arm/boot/dts/nxp/imx/imx7-mba7.dtsi
index 1235a71c6abe96564059010e214f87304d7d4e8c..52869e68f833c4d8f7cefdcefeadba9b8b78f87a 100644 (file)
--- a/arch/arm/boot/dts/nxp/imx/imx7-mba7.dtsi
+++ b/arch/arm/boot/dts/nxp/imx/imx7-mba7.dtsi
@@ -666,7 +666,7 @@
        bus-width = <4>;
        no-1-8-v;
        no-sdio;
-       no-emmc;
+       no-mmc;
        status = "okay";
 };
 

diff --git a/arch/arm/boot/dts/nxp/imx/imx7s-warp.dts b/arch/arm/boot/dts/nxp/imx/imx7s-warp.dts
index ba7231b364bb8c76296e953bbfa450bc49c1293a..7bab113ca6da79ed3941e7d6550fecfd31687f25 100644 (file)
--- a/arch/arm/boot/dts/nxp/imx/imx7s-warp.dts
+++ b/arch/arm/boot/dts/nxp/imx/imx7s-warp.dts
@@ -210,6 +210,7 @@
                                remote-endpoint = <&mipi_from_sensor>;
                                clock-lanes = <0>;
                                data-lanes = <1>;
+                               link-frequencies = /bits/ 64 <330000000>;
                        };
                };
        };

diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi
index 3c42240e78e245fe54ab5c637d9fa071dc2c0b34..4aaf5a0c1ed8af6f7f845be079c9297f35d2d72b 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi
@@ -41,7 +41,7 @@ conn_subsys: bus@5b000000 {
                interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
                fsl,usbphy = <&usbphy1>;
                fsl,usbmisc = <&usbmisc1 0>;
-               clocks = <&usb2_lpcg 0>;
+               clocks = <&usb2_lpcg IMX_LPCG_CLK_6>;
                ahb-burst-config = <0x0>;
                tx-burst-size-dword = <0x10>;
                rx-burst-size-dword = <0x10>;
@@ -58,7 +58,7 @@ conn_subsys: bus@5b000000 {
        usbphy1: usbphy@5b100000 {
                compatible = "fsl,imx7ulp-usbphy";
                reg = <0x5b100000 0x1000>;
-               clocks = <&usb2_lpcg 1>;
+               clocks = <&usb2_lpcg IMX_LPCG_CLK_7>;
                power-domains = <&pd IMX_SC_R_USB_0_PHY>;
                status = "disabled";
        };
@@ -67,8 +67,8 @@ conn_subsys: bus@5b000000 {
                interrupts = <GIC_SPI 232 IRQ_TYPE_LEVEL_HIGH>;
                reg = <0x5b010000 0x10000>;
                clocks = <&sdhc0_lpcg IMX_LPCG_CLK_4>,
-                        <&sdhc0_lpcg IMX_LPCG_CLK_0>,
-                        <&sdhc0_lpcg IMX_LPCG_CLK_5>;
+                        <&sdhc0_lpcg IMX_LPCG_CLK_5>,
+                        <&sdhc0_lpcg IMX_LPCG_CLK_0>;
                clock-names = "ipg", "ahb", "per";
                power-domains = <&pd IMX_SC_R_SDHC_0>;
                status = "disabled";
@@ -78,8 +78,8 @@ conn_subsys: bus@5b000000 {
                interrupts = <GIC_SPI 233 IRQ_TYPE_LEVEL_HIGH>;
                reg = <0x5b020000 0x10000>;
                clocks = <&sdhc1_lpcg IMX_LPCG_CLK_4>,
-                        <&sdhc1_lpcg IMX_LPCG_CLK_0>,
-                        <&sdhc1_lpcg IMX_LPCG_CLK_5>;
+                        <&sdhc1_lpcg IMX_LPCG_CLK_5>,
+                        <&sdhc1_lpcg IMX_LPCG_CLK_0>;
                clock-names = "ipg", "ahb", "per";
                power-domains = <&pd IMX_SC_R_SDHC_1>;
                fsl,tuning-start-tap = <20>;
@@ -91,8 +91,8 @@ conn_subsys: bus@5b000000 {
                interrupts = <GIC_SPI 234 IRQ_TYPE_LEVEL_HIGH>;
                reg = <0x5b030000 0x10000>;
                clocks = <&sdhc2_lpcg IMX_LPCG_CLK_4>,
-                        <&sdhc2_lpcg IMX_LPCG_CLK_0>,
-                        <&sdhc2_lpcg IMX_LPCG_CLK_5>;
+                        <&sdhc2_lpcg IMX_LPCG_CLK_5>,
+                        <&sdhc2_lpcg IMX_LPCG_CLK_0>;
                clock-names = "ipg", "ahb", "per";
                power-domains = <&pd IMX_SC_R_SDHC_2>;
                status = "disabled";

diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
index cab3468b1875ee885f32a842f92d56cc0b744998..f7a91d43a0ffe10e85e2b1e71ff6751c314b6ef7 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
@@ -28,8 +28,8 @@ dma_subsys: bus@5a000000 {
                #size-cells = <0>;
                interrupts = <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>;
                interrupt-parent = <&gic>;
-               clocks = <&spi0_lpcg 0>,
-                        <&spi0_lpcg 1>;
+               clocks = <&spi0_lpcg IMX_LPCG_CLK_0>,
+                        <&spi0_lpcg IMX_LPCG_CLK_4>;
                clock-names = "per", "ipg";
                assigned-clocks = <&clk IMX_SC_R_SPI_0 IMX_SC_PM_CLK_PER>;
                assigned-clock-rates = <60000000>;
@@ -44,8 +44,8 @@ dma_subsys: bus@5a000000 {
                #size-cells = <0>;
                interrupts = <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>;
                interrupt-parent = <&gic>;
-               clocks = <&spi1_lpcg 0>,
-                        <&spi1_lpcg 1>;
+               clocks = <&spi1_lpcg IMX_LPCG_CLK_0>,
+                        <&spi1_lpcg IMX_LPCG_CLK_4>;
                clock-names = "per", "ipg";
                assigned-clocks = <&clk IMX_SC_R_SPI_1 IMX_SC_PM_CLK_PER>;
                assigned-clock-rates = <60000000>;
@@ -60,8 +60,8 @@ dma_subsys: bus@5a000000 {
                #size-cells = <0>;
                interrupts = <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>;
                interrupt-parent = <&gic>;
-               clocks = <&spi2_lpcg 0>,
-                        <&spi2_lpcg 1>;
+               clocks = <&spi2_lpcg IMX_LPCG_CLK_0>,
+                        <&spi2_lpcg IMX_LPCG_CLK_4>;
                clock-names = "per", "ipg";
                assigned-clocks = <&clk IMX_SC_R_SPI_2 IMX_SC_PM_CLK_PER>;
                assigned-clock-rates = <60000000>;
@@ -76,8 +76,8 @@ dma_subsys: bus@5a000000 {
                #size-cells = <0>;
                interrupts = <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>;
                interrupt-parent = <&gic>;
-               clocks = <&spi3_lpcg 0>,
-                        <&spi3_lpcg 1>;
+               clocks = <&spi3_lpcg IMX_LPCG_CLK_0>,
+                        <&spi3_lpcg IMX_LPCG_CLK_4>;
                clock-names = "per", "ipg";
                assigned-clocks = <&clk IMX_SC_R_SPI_3 IMX_SC_PM_CLK_PER>;
                assigned-clock-rates = <60000000>;
@@ -145,8 +145,8 @@ dma_subsys: bus@5a000000 {
                compatible = "fsl,imx8qxp-pwm", "fsl,imx27-pwm";
                reg = <0x5a190000 0x1000>;
                interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
-               clocks = <&adma_pwm_lpcg 1>,
-                        <&adma_pwm_lpcg 0>;
+               clocks = <&adma_pwm_lpcg IMX_LPCG_CLK_4>,
+                        <&adma_pwm_lpcg IMX_LPCG_CLK_0>;
                clock-names = "ipg", "per";
                assigned-clocks = <&clk IMX_SC_R_LCD_0_PWM_0 IMX_SC_PM_CLK_PER>;
                assigned-clock-rates = <24000000>;
@@ -355,8 +355,8 @@ dma_subsys: bus@5a000000 {
                reg = <0x5a880000 0x10000>;
                interrupts = <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>;
                interrupt-parent = <&gic>;
-               clocks = <&adc0_lpcg 0>,
-                        <&adc0_lpcg 1>;
+               clocks = <&adc0_lpcg IMX_LPCG_CLK_0>,
+                        <&adc0_lpcg IMX_LPCG_CLK_4>;
                clock-names = "per", "ipg";
                assigned-clocks = <&clk IMX_SC_R_ADC_0 IMX_SC_PM_CLK_PER>;
                assigned-clock-rates = <24000000>;
@@ -370,8 +370,8 @@ dma_subsys: bus@5a000000 {
                reg = <0x5a890000 0x10000>;
                interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>;
                interrupt-parent = <&gic>;
-               clocks = <&adc1_lpcg 0>,
-                        <&adc1_lpcg 1>;
+               clocks = <&adc1_lpcg IMX_LPCG_CLK_0>,
+                        <&adc1_lpcg IMX_LPCG_CLK_4>;
                clock-names = "per", "ipg";
                assigned-clocks = <&clk IMX_SC_R_ADC_1 IMX_SC_PM_CLK_PER>;
                assigned-clock-rates = <24000000>;
@@ -384,8 +384,8 @@ dma_subsys: bus@5a000000 {
                reg = <0x5a8d0000 0x10000>;
                interrupts = <GIC_SPI 235 IRQ_TYPE_LEVEL_HIGH>;
                interrupt-parent = <&gic>;
-               clocks = <&can0_lpcg 1>,
-                        <&can0_lpcg 0>;
+               clocks = <&can0_lpcg IMX_LPCG_CLK_4>,
+                        <&can0_lpcg IMX_LPCG_CLK_0>;
                clock-names = "ipg", "per";
                assigned-clocks = <&clk IMX_SC_R_CAN_0 IMX_SC_PM_CLK_PER>;
                assigned-clock-rates = <40000000>;
@@ -405,8 +405,8 @@ dma_subsys: bus@5a000000 {
                 * CAN1 shares CAN0's clock and to enable CAN0's clock it
                 * has to be powered on.
                 */
-               clocks = <&can0_lpcg 1>,
-                        <&can0_lpcg 0>;
+               clocks = <&can0_lpcg IMX_LPCG_CLK_4>,
+                        <&can0_lpcg IMX_LPCG_CLK_0>;
                clock-names = "ipg", "per";
                assigned-clocks = <&clk IMX_SC_R_CAN_0 IMX_SC_PM_CLK_PER>;
                assigned-clock-rates = <40000000>;
@@ -426,8 +426,8 @@ dma_subsys: bus@5a000000 {
                 * CAN2 shares CAN0's clock and to enable CAN0's clock it
                 * has to be powered on.
                 */
-               clocks = <&can0_lpcg 1>,
-                        <&can0_lpcg 0>;
+               clocks = <&can0_lpcg IMX_LPCG_CLK_4>,
+                        <&can0_lpcg IMX_LPCG_CLK_0>;
                clock-names = "ipg", "per";
                assigned-clocks = <&clk IMX_SC_R_CAN_0 IMX_SC_PM_CLK_PER>;
                assigned-clock-rates = <40000000>;

diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi
index 7e510b21bbac555b38cede99f97b4edc177bf520..764c1a08e3b118841299d99a5cecb29a095e2f66 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi
@@ -25,8 +25,8 @@ lsio_subsys: bus@5d000000 {
                compatible = "fsl,imx27-pwm";
                reg = <0x5d000000 0x10000>;
                clock-names = "ipg", "per";
-               clocks = <&pwm0_lpcg 4>,
-                        <&pwm0_lpcg 1>;
+               clocks = <&pwm0_lpcg IMX_LPCG_CLK_6>,
+                        <&pwm0_lpcg IMX_LPCG_CLK_1>;
                assigned-clocks = <&clk IMX_SC_R_PWM_0 IMX_SC_PM_CLK_PER>;
                assigned-clock-rates = <24000000>;
                #pwm-cells = <3>;
@@ -38,8 +38,8 @@ lsio_subsys: bus@5d000000 {
                compatible = "fsl,imx27-pwm";
                reg = <0x5d010000 0x10000>;
                clock-names = "ipg", "per";
-               clocks = <&pwm1_lpcg 4>,
-                        <&pwm1_lpcg 1>;
+               clocks = <&pwm1_lpcg IMX_LPCG_CLK_6>,
+                        <&pwm1_lpcg IMX_LPCG_CLK_1>;
                assigned-clocks = <&clk IMX_SC_R_PWM_1 IMX_SC_PM_CLK_PER>;
                assigned-clock-rates = <24000000>;
                #pwm-cells = <3>;
@@ -51,8 +51,8 @@ lsio_subsys: bus@5d000000 {
                compatible = "fsl,imx27-pwm";
                reg = <0x5d020000 0x10000>;
                clock-names = "ipg", "per";
-               clocks = <&pwm2_lpcg 4>,
-                        <&pwm2_lpcg 1>;
+               clocks = <&pwm2_lpcg IMX_LPCG_CLK_6>,
+                        <&pwm2_lpcg IMX_LPCG_CLK_1>;
                assigned-clocks = <&clk IMX_SC_R_PWM_2 IMX_SC_PM_CLK_PER>;
                assigned-clock-rates = <24000000>;
                #pwm-cells = <3>;
@@ -64,8 +64,8 @@ lsio_subsys: bus@5d000000 {
                compatible = "fsl,imx27-pwm";
                reg = <0x5d030000 0x10000>;
                clock-names = "ipg", "per";
-               clocks = <&pwm3_lpcg 4>,
-                        <&pwm3_lpcg 1>;
+               clocks = <&pwm3_lpcg IMX_LPCG_CLK_6>,
+                        <&pwm3_lpcg IMX_LPCG_CLK_1>;
                assigned-clocks = <&clk IMX_SC_R_PWM_3 IMX_SC_PM_CLK_PER>;
                assigned-clock-rates = <24000000>;
                #pwm-cells = <3>;

diff --git a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw72xx.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw72xx.dtsi
index 41c79d2ebdd6201dc10278204c064a4c01c71709..f24b14744799e16bb1145738bfb18fd8343c00ee 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw72xx.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw72xx.dtsi
@@ -14,6 +14,7 @@
                pinctrl-0 = <&pinctrl_usbcon1>;
                type = "micro";
                label = "otg";
+               vbus-supply = <&reg_usb1_vbus>;
                id-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>;
 
                port {
@@ -183,7 +184,6 @@
 };
 
 &usb3_phy0 {
-       vbus-supply = <&reg_usb1_vbus>;
        status = "okay";
 };
 

diff --git a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw73xx.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw73xx.dtsi
index d5c400b355af564123497cd1805e0b0ad56ded21..f5491a608b2f3793ca410871fda7e5005db661e1 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw73xx.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw73xx.dtsi
@@ -14,6 +14,7 @@
                pinctrl-0 = <&pinctrl_usbcon1>;
                type = "micro";
                label = "otg";
+               vbus-supply = <&reg_usb1_vbus>;
                id-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>;
 
                port {
@@ -202,7 +203,6 @@
 };
 
 &usb3_phy0 {
-       vbus-supply = <&reg_usb1_vbus>;
        status = "okay";
 };
 

diff --git a/arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi b/arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi
index 11626fae5f97f3a9b2c94528d1957fdc73f9aac8..aa9f28c4431d0249cce852026eda7a9a7cad3ff0 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi
@@ -153,15 +153,15 @@
 };
 
 &flexcan2 {
-       clocks = <&can1_lpcg 1>,
-                <&can1_lpcg 0>;
+       clocks = <&can1_lpcg IMX_LPCG_CLK_4>,
+                <&can1_lpcg IMX_LPCG_CLK_0>;
        assigned-clocks = <&clk IMX_SC_R_CAN_1 IMX_SC_PM_CLK_PER>;
        fsl,clk-source = /bits/ 8 <1>;
 };
 
 &flexcan3 {
-       clocks = <&can2_lpcg 1>,
-                <&can2_lpcg 0>;
+       clocks = <&can2_lpcg IMX_LPCG_CLK_4>,
+                <&can2_lpcg IMX_LPCG_CLK_0>;
        assigned-clocks = <&clk IMX_SC_R_CAN_2 IMX_SC_PM_CLK_PER>;
        fsl,clk-source = /bits/ 8 <1>;
 };