ARM: dts: rockchip: Add rv1108 GMAC support
authorOtavio Salvador <otavio@ossystems.com.br>
Sun, 25 Nov 2018 21:19:00 +0000 (19:19 -0200)
committerHeiko Stuebner <heiko@sntech.de>
Mon, 26 Nov 2018 09:11:24 +0000 (10:11 +0100)
Add GMAC support for RV1108.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
arch/arm/boot/dts/rv1108.dtsi

index 3a29ea98e5779e08f51566b710b05f5ceb704a1b..8413d5ca900b9b10653087c79818428c47740297 100644 (file)
                status = "disabled";
        };
 
+       gmac: eth@30200000 {
+               compatible = "rockchip,rv1108-gmac";
+               reg = <0x30200000 0x10000>;
+               interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
+               interrupt-names = "macirq", "eth_wake_irq";
+               clocks = <&cru SCLK_MAC>,
+                       <&cru SCLK_MAC_RX>, <&cru SCLK_MAC_RX>,
+                       <&cru SCLK_MAC_REF>, <&cru SCLK_MAC_REFOUT>,
+                       <&cru ACLK_GMAC>, <&cru PCLK_GMAC>;
+               clock-names = "stmmaceth",
+                       "mac_clk_rx", "mac_clk_tx",
+                       "clk_mac_ref", "clk_mac_refout",
+                       "aclk_mac", "pclk_mac";
+               /* rv1108 only supports an rmii interface */
+               phy-mode = "rmii";
+               pinctrl-names = "default";
+               pinctrl-0 = <&rmii_pins>;
+               rockchip,grf = <&grf>;
+               status = "disabled";
+       };
+
        gic: interrupt-controller@32010000 {
                compatible = "arm,gic-400";
                interrupt-controller;
                        };
                };
 
+               gmac {
+                       rmii_pins: rmii-pins {
+                               rockchip,pins = <1 RK_PC5 RK_FUNC_2 &pcfg_pull_none>,
+                                               <1 RK_PC3 RK_FUNC_2 &pcfg_pull_none>,
+                                               <1 RK_PC4 RK_FUNC_2 &pcfg_pull_none>,
+                                               <1 RK_PB2 RK_FUNC_3 &pcfg_pull_none_drv_12ma>,
+                                               <1 RK_PB3 RK_FUNC_3 &pcfg_pull_none_drv_12ma>,
+                                               <1 RK_PB4 RK_FUNC_3 &pcfg_pull_none_drv_12ma>,
+                                               <1 RK_PB5 RK_FUNC_3 &pcfg_pull_none>,
+                                               <1 RK_PB6 RK_FUNC_3 &pcfg_pull_none>,
+                                               <1 RK_PB7 RK_FUNC_3 &pcfg_pull_none>,
+                                               <1 RK_PC2 RK_FUNC_3 &pcfg_pull_none>;
+                       };
+               };
+
                i2c0 {
                        i2c0_xfer: i2c0-xfer {
                                rockchip,pins = <0 RK_PB1 RK_FUNC_1 &pcfg_pull_none_smt>,